CY7C1019-12VC Cypress Semiconductor Corp, CY7C1019-12VC Datasheet

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CY7C1019-12VC

Manufacturer Part Number
CY7C1019-12VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1019-12VC

Density
1Mb
Access Time (max)
12ns
Operating Supply Voltage (typ)
5V
Package Type
SOJ
Operating Temp Range
0C to 70C
Supply Current
220mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1019-12VC
Manufacturer:
HIT
Quantity:
2
Part Number:
CY7C1019-12VC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-05055 Rev. **
Features
Functional Description
The CY7C1019 is a high-performance CMOS static RAM or-
ganized as 131,072 words by 8 bits. Easy memory expansion
is provided by an active LOW chip enable (CE), an active LOW
output enable (OE), and three-state drivers. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Shaded areas contain advance information.
• High speed
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
Logic Block Diagram
WE
CE
OE
— t
A
A
A
A
A
A
A
A
A
AA
0
1
2
3
4
5
6
7
8
= 10 ns
INPUT BUFFER
512 x 256 x 8
DECODER
COLUMN
ARRAY
POWER
DOWN
3901 North First Street
PRELIMINARY
L
L
Writing to the device is accomplished by taking chip enable
(CE) and write enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
fied on the address pins (A
Reading from the device is accomplished by taking chip en-
able (CE) and output enable (OE) LOW while forcing write
enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019 is available in standard 400-mil-wide SOJs.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
7C1019–10
1019–1
0
1
2
3
4
5
6
7
240
210
10
10
0
1
through I/O
San Jose
128K x 8 Static RAM
Pin Configuration
7
) is then written into the location speci-
I/O
I/O
V
I/O
I/O
7C1019–12
V
WE
CE
CC
A
A
A
A
SS
A
A
A
A
7
0
1
2
3
0
1
2
3
4
5
6
0
220
190
12
10
CA 95134
through A
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Top View
0
SOJ
through I/O
Revised August 31, 2001
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1019–2
16
).
A
A
A
A
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
16
15
14
13
SS
CC
12
11
10
9
8
CY7C1019
7
6
5
4
7C1019–15
7
) are placed in a
408-943-2600
200
175
15
10
1

Related parts for CY7C1019-12VC

CY7C1019-12VC Summary of contents

Page 1

... Automatic power-down when deselected • Easy memory expansion with CE and OE options Functional Description The CY7C1019 is a high-performance CMOS static RAM or- ganized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE), an active LOW output enable (OE), and three-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected ...

Page 2

... IH V > < MAX Max > V – 0.3V > V – 0.3V < 0.3V, f=0 IN Test Conditions MHz 5.0V CC CY7C1019 Ambient [2] Temperature + 7C1019-12 7C1019-15 Max. Min. Max. Min. Max. 2.4 2.4 0.4 0.4 0.4 V 2 0.3 + 0.3 + 0.3 0.8 –0.3 0.8 –0.3 0.8 +1 – ...

Page 3

... Min. Max less than less than t HZCE LZCE HZOE ALL INPUT PULSES 3.0V 90% 10% GND 3ns 7C1019-12 7C1019-15 Min. Max. Min and t is less than t for any given device. LZOE HZWE LZWE and t . HZWE SD CY7C1019 90% 10 1019–4 Max. Unit Page ...

Page 4

... DR CE > V – 0.3V > V – 0. DATA RETENTION MODE 3.0V V > CDR OHA ACE t DOE t LZOE 50 CY7C1019 Min. Max + 0.5V 2.0 CC 300 0 < DATA VALID t HZOE t HZCE IMPEDANCE DATA VALID t PD 50% Unit 1019–5 1019–6 HIGH ICC ISB 1019–7 ...

Page 5

... If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. 14. During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05055 Rev. ** PRELIMINARY SCE SCE PWE t SD DATA VALID [12, 13 SCE PWE t SD DATA VALID IN CY7C1019 1019– 1019–9 Page ...

Page 6

... I High High Data Out Data High Z Ordering Information Speed (ns) Ordering Code 10 CY7C1019-10VC CY7C1019L-10VC 12 CY7C1019-12VC CY7C1019L-12VC 15 CY7C1019-15VC CY7C1019L-15VC Shaded area contains advance information. Document #: 38-05055 Rev. ** PRELIMINARY [13 SCE PWE t HZWE –I/O Mode 0 7 Power-Down Power-Down Read Write Selected, Outputs Disabled Package Name ...

Page 7

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY 32-Lead (400-Mil) Molded SOJ V33 CY7C1019 Page ...

Page 8

... Document Title: 7C1019 128K x 8 Static RAM Document Number: 38-05055 Issue REV. ECN NO. Date ** 107246 09/10/01 Document #: 38-05055 Rev. ** PRELIMINARY Orig. of Change Description of Change SZV Change from Spec number: 38-00440 to 38-05055 CY7C1019 Page ...

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