CY7C1041BV33-20ZI Cypress Semiconductor Corp, CY7C1041BV33-20ZI Datasheet

CY7C1041BV33-20ZI

Manufacturer Part Number

CY7C1041BV33-20ZI

Description

Manufacturer

Cypress Semiconductor Corp

Datasheets

1.CY7C1041BV33-20ZI.pdf (14 pages)

2.CY7C1041BV33-20ZI.pdf (11 pages)

3.CY7C1041BV33-20ZI.pdf (11 pages)

Specifications of CY7C1041BV33-20ZI

Density

4Mb

Access Time (max)

20ns

Operating Supply Voltage (typ)

3.3V

Package Type

TSOP

Operating Temp Range

-40C to 85C

Supply Current

170mA

Operating Supply Voltage (min)

Operating Supply Voltage (max)

3.6V

Operating Temperature Classification

Industrial

Mounting

Surface Mount

Pin Count

Word Size

16b

Lead Free Status / Rohs Status

Not Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

CY7C1041BV33-20ZI

Manufacturer:

ALTERA

Quantity:

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Download datasheet (446Kb)

Features

■

Cypress Semiconductor Corporation

Document Number: 38-05134 Rev. *I

Temperature ranges

❐

Pin and function compatible with CY7C1041BV33

High speed

❐

Low active power

❐

2.0V data retention

Automatic power down when deselected

TTL-compatible inputs and outputs

Easy memory expansion with CE and OE features

Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin

TSOP II and 48-Ball FBGA packages

Logic Block Diagram

Commercial: 0°C to 70°C

Industrial: –40°C to 85°C

Automotive-A: –40°C to 85°C

Automotive-E: –40°C to 125°C

324 mW (max)

= 10 ns (Commercial, Industrial and Automotive-A)

= 12 ns (Automotive-E)

•

198 Champion Court

COLUMN DECODER

INPUT BUFFER

RAM Array

256K x 16

Functional Description

The CY7C1041CV33 is a high performance CMOS static RAM

organized as 262,144 words by 16 bits.

To write to the device, take Chip Enable (CE) and Write Enable

(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data

from IO pins (IO

specified on the address pins (A

Enable (BHE) is LOW, then data from IO pins (IO

is written into the location specified on the address pins (A

through A

To read from the device, take Chip Enable (CE) and Output

Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If

Byte Low Enable (BLE) is LOW, then data from the memory

location specified by the address pins appear on IO

Byte High Enable (BHE) is LOW, then data from memory

appears on IO

Table

modes.

The input and output pins (IO

impedance state when the device is deselected (CE HIGH), the

outputs are disabled (OE HIGH), the BHE and BLE are disabled

(BHE, BLE HIGH), or during a write operation (CE LOW and WE

LOW).

For best practice recommendations, refer to the Cypress

application note

on page 9 for a complete description of Read and Write

•

4-Mbit (256K x 16) Static RAM

San Jose

AN1064, SRAM System

to IO

through IO

CA 95134-1709

. For more information, see the

–IO

BHE

BLE

through IO

), is written into the location

CY7C1041CV33

Revised February 14, 2008

through A

Guidelines.

) are placed in a high

•

). If Byte High

408-943-2600

through IO

to IO

Truth

. If

[+] Feedback

)

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