CY7C1041CV33-12VC Cypress Semiconductor Corp, CY7C1041CV33-12VC Datasheet

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CY7C1041CV33-12VC

Manufacturer Part Number
CY7C1041CV33-12VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1041CV33-12VC.pdf (12 pages)

Specifications of CY7C1041CV33-12VC

Density
4Mb
Access Time (max)
12ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
85mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Number Of Words
256K
Lead Free Status / Rohs Status
Not Compliant
Cypress Semiconductor Corporation
Document #: 38-05134 Rev. *H
Features
Notes:
1. For guidelines on SRAM system design, please refer to the “System Design Guidelines” Cypress application note, available on the internet at www.cypress.com.
• Pin equivalent to CY7C1041BV33
• Temperature Ranges
• High speed
• Low active power
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in Pb-free and non Pb-free 44-pin 400-mil-
Logic Block Diagram
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
— t
— 324 mW (max.)
SOJ, 44-pin TSOP II and 48-ball FBGA packages
AA
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
= 10 ns
INPUT BUFFER
DECODER
COLUMN
256K × 16
ARRAY
•
198 Champion Court
I/O
I/O
Functional Description
The CY7C1041CV33 is a high-performance CMOS Static
RAM organized as 262,144 words by 16 bits.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte LOW Enable
(BLE) is LOW, then data from I/O pins (I/O
into the location specified on the address pins (A
HIGH Enable (BHE) is LOW, then data from I/O pins
(I/O
address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte LOW Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the back of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a Write operation
(CE LOW, and WE LOW).
The CY7C1041CV33 is available in a standard 44-pin
400-mil-wide body width SOJ and 44-pin TSOP II package
with center power and ground (revolutionary) pinout, as well
as a 48-ball fine-pitch ball grid array (FBGA) package.
0
4-Mbit (256K x 16) Static RAM
8
–I/O
–I/O
BHE
WE
CE
OE
BLE
8
–I/O
7
15
•
15
San Jose
) is written into the location specified on the
0
–A
17
,
Pin Configuration
).
CA 95134-1709
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
V
0
WE
CE
CC
A
A
A
A
A
SS
A
A
A
A
A
– I/O
5
6
7
8
9
0
1
2
3
4
0
1
2
3
4
5
6
7
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
12
Top View
7
TSOP II
[1]
. If Byte HIGH Enable (BHE) is
0
SOJ/
–I/O
Revised September 1, 2006
CY7C1041CV33
15
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
) are placed in a
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
A
SS
CC
17
16
15
14
13
12
11
10
•
15
14
13
12
11
10
9
8
0
–I/O
8
0
408-943-2600
–A
to I/O
7
), is written
17
). If Byte
15
. See

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CY7C1041CV33-12VC Summary of contents

Page 1

... HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a Write operation (CE LOW, and WE LOW). The CY7C1041CV33 is available in a standard 44-pin 400-mil-wide body width SOJ and 44-pin TSOP II package with center power and ground (revolutionary) pinout, as well as a 48-ball fine-pitch ball grid array (FBGA) package ...

Page 2

... Maximum Operating Current Maximum CMOS Standby Current Pin Configurations Document #: 38-05134 Rev. *H -10 10 Commercial 90 Industrial 100 Automotive-A 100 Automotive-E Commercial/ 10 Industrial Automotive-A 10 Automotive-E 48-ball FBGA (Top View BLE I BHE I I/O I I/O I I/O I I/O I CY7C1041CV33 -12 - Unit Page ...

Page 3

... When LOW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, I/O pins are tri-stated, and act as input data pins. D1, E6 Ground Ground for the device. Should be connected to ground of the system. D6, E1 Power Supply Power Supply inputs to the device. CY7C1041CV33 Description , BLE controls I/O –I Page ...

Page 4

... CC Auto-A 10 > V – 0.3V, CC < 0.3V Auto-E IN Test Conditions T = 25° MHz CY7C1041CV33 Ambient Temperature 0°C to +70°C –40°C to +85°C –40°C to +85°C –40°C to +125°C -12 -15 Max. Min. Max. Min. Max. 2.4 2.4 2.4 0.4 ...

Page 5

... CC is less than less than t HZCE LZCE HZOE CY7C1041CV33 TSOP-II FBGA 42.96 38.15 10.75 9.15 R 317Ω R2 351Ω High-Z Characteristics R 317Ω 3.3V OUTPUT 5 pF (d) -15 -20 Max. Min. Max. Min. Max. 100 100 ...

Page 6

... Address valid prior to or coincident with CE transition LOW. Document #: 38-05134 Rev. *H [5] Over the Operating Range (continued) -10 -12 Min. Max. Min OHA ACE t DOE t LZOE t DBE t LZBE 50 CY7C1041CV33 -15 -20 Max. Min. Max. Min. Max DATA VALID t HZOE t HZCE t HZBE IMPEDANCE DATA VALID t PD 50% and t . HZWE SD Unit ...

Page 7

... Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 14. Data I/O is high-impedance BHE and/or BLE = V 15 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05134 Rev SCE PWE PWE t SCE CY7C1041CV33 Page ...

Page 8

... High-Z High-Z Data Out Data Out Data Out High-Z High-Z Data Out Data In Data In Data In High-Z High-Z Data In High-Z High-Z CY7C1041CV33 LZWE Mode Power-down Standby (I Read All Bits Active (I Read Lower Bits Only Active (I Read Upper Bits Only Active (I Write All Bits ...

Page 9

... Ordering Information Speed (ns) Ordering Code 10 CY7C1041CV33-10BAC CY7C1041CV33-10BAXC CY7C1041CV33-10VC CY7C1041CV33-10VXC CY7C1041CV33-10ZC CY7C1041CV33-10ZXC CY7C1041CV33-10BAI CY7C1041CV33-10BAXI CY7C1041CV33-10ZI CY7C1041CV33-10ZXI CY7C1041CV33-10ZSXA CY7C1041CV33-10BAXA 12 CY7C1041CV33-12VC CY7C1041CV33-12VXC CY7C1041CV33-12ZC CY7C1041CV33-12ZXC CY7C1041CV33-12VXI CY7C1041CV33-12ZI CY7C1041CV33-12ZXI 15 CY7C1041CV33-15VC CY7C1041CV33-15VXC CY7C1041CV33-15ZC CY7C1041CV33-15ZXC CY7C1041CV33-15VI CY7C1041CV33-15VXI CY7C1041CV33-15ZI CY7C1041CV33-15ZXI 20 CY7C1041CV33-20ZC CY7C1041CV33-20ZXC CY7C1041CV33-20ZSXA CY7C1041CV33-20VE CY7C1041CV33-20VXE CY7C1041CV33-20ZE CY7C1041CV33-20ZSXE Please contact your local Cypress sales representative for availability of these parts Document #: 38-05134 Rev ...

Page 10

... Package Diagrams 48-Ball (7. 8 1.2 mm) FBGA (51-85106) TOP VIEW A1 CORNER 7.00±0.10 SEATING PLANE C Document #: 38-05134 Rev. *H CY7C1041CV33 BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 A 0.75 3.75 B 7.00±0.10 0.15(4X) 51-85106-*E Page ...

Page 11

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 44-lead (400-mil) Molded SOJ (51-85082) 44-pin TSOP II (51-85087) CY7C1041CV33 51-85082-*B 51-85087-*A Page ...

Page 12

... Document History Page Document Title: CY7C1041CV33 4-Mbit (256K x 16) Static RAM Document Number: 38-05134 REV. ECN NO. Issue Date ** 109513 12/13/01 *A 112440 12/20/01 *B 112859 03/25/02 *C 116477 09/16/02 *D 119797 10/21/02 *E 262949 See ECN *F 361795 See ECN *G 435387 See ECN *H 499153 See ECN Document #: 38-05134 Rev. *H Orig ...

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