CY7C1041CV33-20ZI Cypress Semiconductor Corp, CY7C1041CV33-20ZI Datasheet

CY7C1041CV33-20ZI

Manufacturer Part Number
CY7C1041CV33-20ZI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1041CV33-20ZI

Density
4Mb
Access Time (max)
20ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
85mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Number Of Words
256K
Lead Free Status / Rohs Status
Not Compliant
Features
Cypress Semiconductor Corporation
Document Number: 38-05134 Rev. *I
Temperature ranges
Pin and function compatible with CY7C1041BV33
High speed
Low active power
2.0V data retention
Automatic power down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin
TSOP II and 48-Ball FBGA packages
Logic Block Diagram
Commercial: 0°C to 70°C
Industrial: –40°C to 85°C
Automotive-A: –40°C to 85°C
Automotive-E: –40°C to 125°C
t
t
324 mW (max)
AA
AA
= 10 ns (Commercial, Industrial and Automotive-A)
= 12 ns (Automotive-E)
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
198 Champion Court
COLUMN DECODER
INPUT BUFFER
RAM Array
256K x 16
Functional Description
The CY7C1041CV33 is a high performance CMOS static RAM
organized as 262,144 words by 16 bits.
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
specified on the address pins (A
Enable (BHE) is LOW, then data from IO pins (IO
is written into the location specified on the address pins (A
through A
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on IO
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
Table
modes.
The input and output pins (IO
impedance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), the BHE and BLE are disabled
(BHE, BLE HIGH), or during a write operation (CE LOW and WE
LOW).
For best practice recommendations, refer to the Cypress
application note
on page 9 for a complete description of Read and Write
4-Mbit (256K x 16) Static RAM
17
San Jose
).
8
AN1064, SRAM System
to IO
0
through IO
,
15
CA 95134-1709
IO
IO
. For more information, see the
0
8
–IO
–IO
BHE
WE
OE
BLE
CE
0
7
15
through IO
7
), is written into the location
0
CY7C1041CV33
Revised February 14, 2008
through A
15
Guidelines.
) are placed in a high
17
). If Byte High
8
408-943-2600
through IO
0
to IO
Truth
7
15
. If
0
[+] Feedback
)

Related parts for CY7C1041CV33-20ZI

CY7C1041CV33-20ZI Summary of contents

Page 1

... Document Number: 38-05134 Rev. *I 4-Mbit (256K x 16) Static RAM Functional Description The CY7C1041CV33 is a high performance CMOS static RAM organized as 262,144 words by 16 bits. To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data ...

Page 2

... Figure 1. 44-Pin SOJ/TSOP II (Top View Note 1. NC pins are not connected on the die. Document Number: 38-05134 Rev. *I -10 - Commercial 90 85 Industrial 100 95 Automotive-A 100 Automotive-E 120 Commercial Industrial Automotive-A 10 Automotive-E 15 [1] Figure 2. 48-Ball FBGA Pinout (Top View BLE OE BHE IO BLE CY7C1041CV33 - BHE Page Unit [+] Feedback ...

Page 3

... Control When LOW, the IO pins are allowed to behave as outputs. When deasserted HIGH, the IO pins are tri-stated and act as input data pins. Ground Ground for the Device. Connected to ground of the system. Power Supply Power Supply Inputs to the Device. CY7C1041CV33 Description – Page ...

Page 4

... Auto-E < MAX , Com’l/Ind’ – 0.3V, CC Auto-A 10 > V – 0.3V, CC Auto-E < 0.3V CY7C1041CV33 Ambient V CC Temperature ( 3.3V ± 10% 0°C to +70°C –40°C to +85°C –40°C to +85°C –40°C to +125°C -12 -15 -20 Min Max Min Max Min Max 2 ...

Page 5

... Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA/JESD51 Figure 3. AC Test Loads and Waveforms 12-, 15-, 20-ns devices: 50 Ω 30 pF* 1.5V (a) High-Z characteristics: 90% 10% (c) Fall Time: 1 V/ns CY7C1041CV33 . Max Unit SOJ TSOP II FBGA °C/W 25.99 42.96 38.15 ° ...

Page 6

... Comm’l/Ind’l/Auto-A 5 Auto Comm’l/Ind’l/Auto-A 5 Auto values until the first memory access is performed less than less than less than t LZCE HZBE LZBE HZOE AC Test Loads and Waveforms and t HZWE CY7C1041CV33 -12 -15 -20 Max Min Max Min Max 100 100 ...

Page 7

... Device is continuously selected. OE, CE, BHE, and/or BLE = V 11 HIGH for read cycle. 12. Address valid prior to or coincident with CE transition LOW. Document Number: 38-05134 Rev OHA DOE t LZOE DBE DATA VALID 50 CY7C1041CV33 [10, 11] DATA VALID [11, 12] t HZOE t HZCE t HZBE HIGH IMPEDANCE 50 Page [+] Feedback ...

Page 8

... ADDRESS t SA BHE, BLE WE CE DATA IO Notes 13. Data IO is high impedance if OE, BHE, and/or BLE = V 14 goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state. Document Number: 38-05134 Rev. *I [13, 14 SCE PWE PWE t SCE CY7C1041CV33 Page [+] Feedback ...

Page 9

... Data Out Read – Upper Bits Only Data In Data In Write – All Bits Data In High Z Write – Lower Bits Only High Z Data In Write – Upper Bits Only High Z High Z Selected, Outputs Disabled High Z High Z Selected, Outputs Disabled CY7C1041CV33 LZWE Power Standby ( Active ( Active (I ) ...

Page 10

... Fine Pitch BGA (Pb-Free) CY7C1041CV33-12ZSXE 51-85087 44-pin TSOP II (Pb-Free) 15 CY7C1041CV33-15ZXC 51-85087 44-pin TSOP II (Pb-Free) CY7C1041CV33-15VI 51-85082 44-pin (400-mil) Molded SOJ CY7C1041CV33-15VXI CY7C1041CV33-15ZI 51-85087 44-pin TSOP II CY7C1041CV33-15ZXI 20 CY7C1041CV33-20ZC 51-85087 44-pin TSOP II CY7C1041CV33-20ZSXA 51-85087 44-pin TSOP II (Pb-Free) CY7C1041CV33-20VE 51-85082 44-pin (400-mil) Molded SOJ ...

Page 11

... Package Diagrams Figure 9. 44-Pin (400 Mil) Molded SOJ, 51-85082 Document Number: 38-05134 Rev. *I CY7C1041CV33 51-85082-*B Page [+] Feedback ...

Page 12

... Package Diagrams (continued) Figure 10. 44-Pin Thin Small Outline Package Type II, 51-85087 Document Number: 38-05134 Rev. *I CY7C1041CV33 51-85087-*A Page [+] Feedback ...

Page 13

... Package Diagrams (continued) Figure 11. 48-Ball FBGA (7 x 8.5 x 1.2 mm), 51-85106 TOP VIEW A1 CORNER 7.00±0.10 SEATING PLANE C Document Number: 38-05134 Rev. *I CY7C1041CV33 BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 A 0.75 3.75 B 7.00±0.10 0.15(4X) 51-85106-*E Page [+] Feedback ...

Page 14

... Document History Page Document Title: CY7C1041CV33, 4-Mbit (256K x 16) Static RAM Document Number: 38-05134 Issue Orig. of REV. ECN NO. Date Change ** 109513 12/13/01 HGK *A 112440 12/20/01 BSS *B 112859 03/25/02 DFP *C 116477 09/16/02 CEA *D 119797 10/21/02 DFP *E 262949 See ECN RKF *F 361795 See ECN ...

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