LM2696MXAX | |
|---|---|
| Manufacturer Part Number | LM2696MXAX |
| Manufacturer | National Semiconductor |
| LM2696MXAX datasheets |
|
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Specifications of LM2696MXAX | |||
|---|---|---|---|
| Dc To Dc Converter Type | Step Down | Number Of Outputs | 1 |
| Pin Count | 16 | Input Voltage | 24V |
| Output Voltage | 1.29 to 20V | Switching Freq | 100 TO 500KHz |
| Output Current | 3A | Efficiency | 90% |
| Package Type | TSSOP EP | Output Type | Adjustable |
| Switching Regulator | Yes | Load Regulation | 0.03% |
| Mounting | Surface Mount | Input Voltage (min) | 4.5V |
| Operating Temp Range | -40C to 125C | Operating Temperature Classification | Automotive |
| Lead Free Status / Rohs Status | Not Compliant | ||
PrevNext
FIGURE 8. Average Output Voltage and Regulation Point
The output voltage is given by the following relationship:
as discussed in the Feedback Resistor section of this docu-
ment.
TRANSIENT RESPONSE
Constant on-time architectures have inherently excellent tran-
sient line and load response. This is because the control loop
is extremely fast. Any change in the line or load conditions will
result in a nearly instantaneous response in the PWM off time.
If one considers the switcher response to be nearly cycle-by-
cycle, and amount of energy contained in a single PWM pulse,
there will be very little change in the output for a given change
in the line or load.
EFFICIENCY
The constant on-time architecture features high efficiency
even at light loads. The ability to achieve high efficiency at
light loads is due to the fact that the off-time will become nec-
essarily long at light loads. Having extended the off-time,
there is little mechanism for loss during this interval.
The efficiency is easily estimated using the following relation-
ships:
Power loss due to FET:
P
= P
+ P
+ P
FET
C
GC
SW
Where:
P
= D • (I
2
• R
)
C
OUT
DS_ON
P
= AV
+ V
• Q
• f
GC
IN
GS
GS
SW
P
= 0.5 • V
· I
• (t
+ t
) • f
SW
IN
OUT
r
f
SW
Typical values are:
R
= 130 mΩ
DS_ON
V
= 4V
GS
Q
= 13.3 nC
GS
t
= 3.8 ns
r
t
= 4.5 ns
f
Power loss due to catch diode:
P
= (1-D) • (I
• V
)
D
OUT
f
Power loss due to DCR and ESR:
P
= I
2
• R
DCR
OUT
DCR
√
P
= I
2
/
12 • R
ESR_OUTPUT
RIPPLE
ESR_OUTPUT
20153447
P
= I
2
(D(1-D)) • R
ESR_INPUT
OUT
ESR_INPUT
Power loss due to Controller:
P
= V
• I
CONT
IN
Q
I
is typically 1.3 mA
Q
The efficiency may be calculated as shown below:
Total power loss = P
+ P
+ P
FET
D
DCR
+ P
PUT
CONT
Power Out = I
• V
OUT
OUT
PRE-BIAS LOAD STARTUP
Should the LM2696 start into a pre-biased load the output will
not be pulled low. This is because the part is asynchronous
and cannot sink current. The part will respond to a pre-biased
load by simply enabling PWM high or extending the off-time
until regulation is achieved. This is to say that if the output
voltage is greater than the regulation voltage the off-time will
extend until the voltage discharges through the feedback re-
sistors. If the load voltage is greater than the regulation volt-
age, a series of pulses will charge the output capacitor to its
regulation voltage.
THERMAL CONSIDERATIONS
The thermal characteristics of the LM2696 are specified using
the parameter θ
, which relates the junction temperature to
JA
the ambient temperature. While the value of θ
a given set of test parameters (including board thickness,
number of layers, orientation, etc), it provides the user with a
common point of reference.
To obtain an estimate of a devices junction temperature, one
may use the following relationship:
(1-Efficiency) x θ
T
= P
J
IN
Where:
T
is the junction temperature in ºC
J
P
is the input power in Watts (P
IN
IN
θ
is the thermal coefficient of the LM2696
JA
T
is the ambient temperature in ºC
A
LAYOUT CONSIDERATIONS
The LM2696 regulation and under-voltage comparators are
very fast and will respond to short duration noise pulses. Lay-
out considerations are therefore critical for optimum perfor-
15
+ P
+ P
ESR_OUTPUT
ESR_IN-
is specific to
JA
+ T
JA
A
= V
·I
)
IN
IN
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