W39V040FAP Winbond Electronics, W39V040FAP Datasheet
W39V040FAP
Specifications of W39V040FAP
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W39V040FAP Summary of contents
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... Embedded #Data Polling Algorithm............................................................................. 15 6.23 Embedded Toggle Bit Algorithm.................................................................................. 15 6.24 Software Product Identification and Boot Block Lockout Detection Acquisition Flow . 16 6.25 Boot Block Lockout Enable Acquisition Flow .............................................................. 17 W39V040FA Data Sheet 512K × 8 CMOS FLASH MEMORY WITH FWH INTERFACE Publication Release Date: April 14, 2005 - 1 - Revision A6 ...
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ELECTRICAL CHARACTERISTICS......................................................................................... 18 7.1 Absolute Maximum Ratings ......................................................................................... 18 7.2 Programmer interface Mode DC Operating Characteristics........................................ 18 7.3 FWH Interface Mode DC Operating Characteristics ................................................... 19 7.4 Power-up Timing.......................................................................................................... 19 7.5 Capacitance................................................................................................................. 19 8. PROGRAMMER INTERFACE MODE AC CHARACTERISTICS............................................. ...
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Reset Timing Diagram ................................................................................................. 35 12. 13. ORDERING INFORMATION .............................................................................................. 36 13. HOW TO READ THE TOP MARKING...................................................................................... 36 14. PACKAGE DIMENSIONS ......................................................................................................... 37 14.1 32L PLCC .................................................................................................................... 37 14.2 32L STSOP.................................................................................................................. 37 14.3 40L TSOP ( ...
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... This device can operate at two modes, Programmer bus interface mode and FWH bus interface mode the Programmer interface mode, it acts like the traditional flash but with a multiplexed address inputs. But in the FWH interface mode, this device complies with the Intel FWH specification. ...
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PIN CONFIGURATIONS ...
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... FWH mode. In Programmer mode, this device just behaves like traditional flash parts with 8 data lines. But the row and column address inputs are multiplexed. The row address are mapped to the higher internal address A[18:11]. And the column address are mapped to the lower internal address A[10:0] ...
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DQ2/DQ3 at the address 7FFF2 to see whether the #TBL/#WP pin is in low or high state. If the DQ2 is "0", it means the #TBL pin is tied to high state. In such condition, whether boot block ...
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Hardware Data Protection The integrity of the data stored in the W39V040FA is also hardware protected in the following ways: (1) Noise/Glitch Protection: A #WE pulse of less than duration will not initiate a write cycle. ...
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Block Locking Registers This part provides 8 even 64Kbytes blocks, and each block can be locked by register control. These control registers can be set or clear through memory address. Below is the detail description. Block Locking Registers type ...
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Read Lock Any attempt to read the data of read locked block will result in “00.” The default state of any block is unlocked upon power up. User can clear or set the write lock bit anytime as long ...
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Operating Mode Selection - FWH Mode Operation modes in FWH interface mode are determined by "START Cycle" when it is selected. When it is not selected, its outputs (FWH[3:0]) will be disable. Please reference to the "FWH Cycle Definition". ...
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FWH Cycle Definition NO. OF FIELD CLOCKS "1101b" indicates FWH Memory Read cycle; while "1110b" indicates FWH START 1 Memory Write cycle. 0000b" appears on FWH bus to indicate the initial IDSEL 1 This one clock field indicates which ...
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Embedded Programming Algorithm Increment Address Program Command Sequence (Address/Command): Start Write Program Command Sequence (see below) #Data Polling/ Toggle bit No Last Address ? Yes Programming Completed 5555H/AAH 2AAAH/55H 5555H/A0H Program Address/Program Data Publication Release Date: April 14, 2005 ...
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Embedded Erase Algorithm Write Erase Command Sequence #Data Polling or Toggle Bit Successfully Completed Chip Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H Start (see below) Erasure Completed Individual Sector Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H ...
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Embedded #Data Polling Algorithm 6.23 Embedded Toggle Bit Algorithm Start VA = Byte address for programming Read Byte (DQ0 - DQ7) Address = VA No DQ7 = Data ? Yes Pass Start Read Byte (DQ0 - DQ7) Address = ...
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Software Product Identification and Boot Block Lockout Detection Acquisition Flow Product Identification Entry (1) Load data AA to address 5555 Load data 55 to address 2AAA Load data 90 to address 5555 μ Pause 10 S Notes for software ...
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Boot Block Lockout Enable Acquisition Flow Boot Block Lockout Feature Set Flow Load data AA to address 5555 Load data 55 to address 2AAA Load data 80 to address 5555 Load data AA to address 5555 Load data 55 ...
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ELECTRICAL CHARACTERISTICS 7.1 Absolute Maximum Ratings PARAMETER Power Supply Voltage Operating Temperature Storage Temperature D.C. Voltage on Any Pin to Ground Potential Transient Voltage (<20 nS) on Any Pin to Ground Potential Note: Exposure to conditions ...
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FWH Interface Mode DC Operating Characteristics = 3.3V ± 0.3V 0V 70° PARAMETER SYM. Power Supply Current I CC Standby Current 1 Isb1 Standby Current 2 Isb2 Input ...
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PROGRAMMER INTERFACE MODE AC CHARACTERISTICS 8.1 AC Test Conditions PARAMETER Input Pulse Levels Input Rise/Fall Time Input/Output Timing Level Output Load 8.2 AC Test Load and Waveform D OUT 30 pF (Including Jig and Scope 0.9 V ...
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Read Cycle Timing Parameters = 3.3V ± 0.3V 0V 70° PARAMETER Read Cycle Time Row / Column Address Set Up Time Row / Column Address Hold Time Address ...
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TIMING WAVEFORMS FOR PROGRAMMER INTERFACE MODE 9.1 Read Cycle Timing Diagram #RESET T RST A[10: #WE #OE High-Z DQ[7:0] 9.2 Write Cycle Timing Diagram T RST #RESET Column Address A[10: #OE ...
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Timing Waveforms for Programmer Interface Mode, continued 9.3 Program Cycle Timing Diagram A[10:0] (Internal A[18:0]) 5555 DQ[7: #OE #WE Byte 0 Note: The internal address A[18:0] are converted from external Column/Row address Column/Row Address are mapped to the ...
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Timing Waveforms for Programmer Interface Mode, continued 9.5 Toggle Bit Timing Diagram A[10: #WE #OE DQ6 9.6 Boot Block Lockout Enable Timing Diagram A[10:0] 5555 (Internal A[18:0]) DQ[7: # #WE SB0 Note: The ...
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Timing Waveforms for Programmer Interface Mode, continued 9.7 Chip Erase Timing Diagram A[10:0] 5555 (Internal A[18:0]) DQ[7: #OE #WE Note: The internal address A[18:0] are converted from external Column/Row addre Column/Row Address are mapped to the Low/High order ...
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FWH INTERFACE MODE AC CHARACTERISTICS 10.1 AC Test Conditions PARAMETER Input Pulse Levels Input Rise/Fall Slew Rate Input/Output Timing Level Output Load 10.2 Read/Write Cycle Timing Parameters = 3.3V ± 0.3V 0V ...
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TIMING WAVEFORMS FOR FWH INTERFACE MODE 11.1 Read Cycle Timing Diagram CLK #RESET FWH4 Start FWH IDSEL Read FWH[3:0] 1101b XXXXb 0000b 1 Clock 1 Clock Note: When A22 = high, the host will read ...
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Timing Waveforms, for FWH Interface Mode, continued 11.3 Program Cycle Timing Diagram CLK #RESET FWH4 1st Start IDSEL 1110b XXXXb FWH[3:0 ] XXXXb 0000b 1 Clock 1 Clock CLK #RESET FWH4 2nd Start IDSEL FWH[3:0 ] XXXXb 1110b XXXXb 0000b ...
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Timing Waveforms for FWH Interface Mode, continued 11.4 #DATA Polling Timing Diagram CLK #RESET FWH4 Start IDSEL XXXXb 0000b FWH[3:0] 1110b 1 Clock 1 Clock CLK #RESET FWH4 Start IDSEL XXXXb FWH[3:0] 1101b 0000b 1 Clock 1 Clock CLK #RESET ...
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Timing Waveforms for FWH Interface Mode, continued 11.5 Toggle Bit Timing Diagram CLK #RESET FWH4 Start IDSEL XXXXb FWH[3:0] 1110b 0000b 1 Clock 1 Clock CLK #RESET FWH4 Start IDSEL FWH[3:0] 1101b 0000b XXXXb 1 Clock 1 Clock CLK #RESET ...
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Timing Waveforms for FWH Interface Mode, continued 11.6 Boot Block Lockout Enable Timing Diagram CLK #RESET FWH4 IDSEL 1st Start XXXXb FWH[3:0] 1110b 0000b 1 Clock 1 Clock CLK #RESET FWH4 IDSEL 2nd Start FWH[3:0] XXXXb 1110b 0000b 1 Clock ...
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Timing Waveforms for FWH Interface Mode, continued 11.7 Chip Erase Timing Diagram CLK #RESET FWH4 IDSEL 1st Start FWH[3:0] 1110b 0000b 1 Clock 1 Clock CLK #RESET FWH4 IDSEL 2th Start FWH[3:0] 1110b 0000b 1 Clock 1 Clock CLK #RESET ...
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Timing Waveforms for FWH Interface Mode, continued 11.8 Sector Erase Timing Diagram CLK #RESET FWH4 1st Start IDSEL FWH[3:0] 0000b 1110b 1 Clock 1 Clock CLK #RESET FWH4 IDSEL 2nd Start FWH[3:0] 1110b 0000b 1 Clock 1 Clock CLK #RESET ...
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Timing Waveforms for FWH Interface Mode, continued 11.9 Page Erase Timing Diagram CLK #RESET FWH4 1st Start IDSEL FWH[3:0] 0000b XXXXb 1110b 1 Clock 1 Clock CLK #RESET FWH4 IDSEL 2nd Start FWH[3:0] XXXXb 1110b 0000b 1 Clock 1 Clock ...
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Timing Waveforms for FWH Interface Mode, continued 11.10 FGPI Register/Product ID Readout Timing Diagram CLK #RESET FWH4 IDSEL Start FWH[3:0] 1101b 0000b A[27:24] A[23:20] A[19:16] 1 Clock 1 Clock Load Address "FFBC0100(hex)" Clocks for GPI Register & "FFBC0000(hex)/FFBC0001(hex) ...
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... TIME PART NO. (nS) W39V040FAP 11 W39V040FAQ 11 W39V040FAT 11 W39V040FAPZ 11 W39V040FAQZ 11 W39V040FATZ 11 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. ...
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... Notes: 1. Dimensions D & not include interlead flash. 2. Dimension b1 does not include dambar protrusion/intrusio 3. Controlling dimension: Inches 4. General appearance spec. should be based on final visual inspection sepc. Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. ...
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Package Dimensions, continued 14.3 40L TSOP ( mm 0.08 0. W39V040FA 0.003 0.008 ...
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VERSION HISTORY VERSION DATE A1 June 19, 2002 A2 Dec. 16, 2002 A3 Nov. 18, 2003 A4 Aug 2004 A5 Nov. 25, 2004 A6 April 14, 2005 Winbond products are not designed, intended, authorized or warranted for ...
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W39V040FA ...