UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet

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UPD78F9418AGK-9EU

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UPD78F9418AGK-9EU
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Renesas Electronics America
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UPD78F9418AGK-9EU Summary of contents

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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...

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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...

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User’s Manual PD789407A, 789417A Subseries 8-Bit Single-Chip Microcontrollers PD789405A PD789406A PD789407A Document No. U13952EJ3V1UD00 (3rd edition) Date Published October 2005 N CP(K) 1999, 2003 Printed in Japan PD789415A PD789416A PD789417A PD78F9418A ...

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User’s Manual U13952EJ3V1UD ...

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NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...

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EEPROM and FIP are trademarks of NEC Electronics Corporation. Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/ trademark of International Business Machines Corporation. HP9000 series ...

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Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country to obtain a list of authorized representatives and ...

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Page U13952EJ2V0UD00 U13952EJ3V0UD00 pp.38, 39, 41 Modification of pin handling of AV p.92 Addition of Note related to feedback resistor in Figure 5-3 Format of Suboscillation Mode Register pp.112, 113 Addition of 6.5 Cautions on Using 16-Bit Timer 50 pp.151, ...

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Target Readers This manual is intended for users who wish to understand the functions of the PD789407A and systems and programs using these microcontrollers. Target products: Purpose This manual is intended to give users an understanding of the functions described ...

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Conventions Data significance: Active low representation: Note: Caution: Remark: Numerical representation: Related Documents The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices PD789407A, 789417A Subseries User’s ...

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Documents Related to Flash Memory Writing PG-FP3 Flash Memory Programmer User’s Manual PG-FP4 Flash Memory Programmer User’s Manual Other Related Documents SEMICONDUCTOR SELECTION GUIDE - Products and Packages - Semiconductor Device Mount Manual Quality Grades on NEC Semiconductor Devices NEC ...

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CHAPTER 1 GENERAL...........................................................................................................................23 1.1 Features.........................................................................................................................................23 1.2 Applications ..................................................................................................................................23 1.3 Ordering Information....................................................................................................................24 1.4 Pin Configuration (Top View) ......................................................................................................25 1.5 78K/0S Series Lineup ...................................................................................................................27 1.6 Block Diagram...............................................................................................................................30 1.7 Overview of Functions .................................................................................................................31 CHAPTER 2 PIN FUNCTIONS ...............................................................................................................33 2.1 List of Pin Functions ...

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General-purpose registers................................................................................................................. 57 3.2.3 Special function registers (SFR)........................................................................................................ 58 3.3 Instruction Address Addressing................................................................................................. 61 3.3.1 Relative addressing........................................................................................................................... 61 3.3.2 Immediate addressing ....................................................................................................................... 62 3.3.3 Table indirect addressing .................................................................................................................. 63 3.3.4 Register addressing .......................................................................................................................... 63 3.4 Operand Address Addressing .................................................................................................... ...

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CHAPTER 6 16-BIT TIMER 50.............................................................................................................101 6.1 Function of 16-Bit Timer 50 .......................................................................................................101 6.2 Configuration of 16-Bit Timer 50...............................................................................................102 6.3 Registers Controlling 16-Bit Timer 50 ......................................................................................104 6.4 Operation of 16-Bit Timer 50 .....................................................................................................107 6.4.1 Operation as timer interrupt............................................................................................................. 107 6.4.2 Operation ...

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Cautions on Using 8-Bit A/D Converter .................................................................................149 CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES)...........................................153 11.1 Function of 10-Bit A/D Converter ...........................................................................................153 11.2 Configuration of 10-Bit A/D Converter ...................................................................................153 11.3 Registers Controlling 10-Bit A/D Converter ..........................................................................156 11.4 Operation of ...

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Maskable interrupt acknowledgment operation ............................................................................. 240 15.4.3 Multiple interrupt servicing............................................................................................................. 241 15.4.4 Putting interrupt requests on hold.................................................................................................. 243 CHAPTER 16 STANDBY FUNCTION ..................................................................................................244 16.1 Standby Function and Configuration .....................................................................................244 16.1.1 Standby function............................................................................................................................ 244 16.1.2 Standby function control register ................................................................................................... ...

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A.4 Flash Memory Writing Tools.....................................................................................................304 A.5 Debugging Tools (Hardware)....................................................................................................305 A.6 Debugging Tools (Software).....................................................................................................306 A.7 Package Drawings of Conversion Socket and Conversion Adapter....................................307 A.7.1 Package drawing and recommended footprint of conversion socket (EV-9200GC-80) .................. 307 A.7.2 Package drawing of conversion adapter ...

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Figure No. 2-1 Pin I/O Circuits .............................................................................................................................................42 3-1 Memory Map ( PD789405A and PD789415A)...........................................................................................44 3-2 Memory Map ( PD789406A and PD789416A)...........................................................................................45 3-3 Memory Map ( PD789407A and PD789417A)...........................................................................................46 3-4 Memory Map ( PD78F9418A)......................................................................................................................47 3-5 Data Memory Addressing ( PD789405A and ...

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Figure No. 6-1 Block Diagram of 16-Bit Timer 50...............................................................................................................102 6-2 Format of 16-Bit Timer Mode Control Register 50......................................................................................105 6-3 Format of Port Mode Register 2 .................................................................................................................106 6-4 Settings of 16-Bit Timer Mode Control Register 50 for Timer Interrupt Operation ......................................107 ...

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Figure No. 10-12 AV Pin Processing ..................................................................................................................................152 DD 11-1 Block Diagram of 10-Bit A/D Converter ......................................................................................................154 11-2 Format of A/D Converter Mode Register 0 .................................................................................................156 11-3 Format of A/D Input Selection Register 0 ...................................................................................................157 11-4 Basic Operation of 10-Bit A/D ...

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Figure No. 14-12 Two-Time-Slice LCD Display Pattern and Electrode Connections .............................................................218 14-13 Example of Connecting Two-Time-Slice LCD Panel ..................................................................................219 14-14 Two-Time-Slice LCD Drive Waveform Examples (1/2 Bias Method)..........................................................220 14-15 Three-Time-Slice LCD Display Pattern and Electrode Connections...........................................................221 14-16 Example of Connecting ...

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Figure No. 18-6 Malfunction of Another Device....................................................................................................................262 18-7 Signal Conflict (RESET Pin) .......................................................................................................................263 18-8 Example of Flash Memory Writing Adapter Connection When Using 3-Wire Serial I/O Mode....................264 18-9 Example of Flash Memory Writing Adapter Connection When Using UART Mode ....................................265 ...

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Table No. 2-1 Types of Pin I/O Circuits...............................................................................................................................41 3-1 Internal ROM Capacity .................................................................................................................................48 3-2 Vector Table.................................................................................................................................................48 3-3 Special Function Register List ......................................................................................................................59 4-1 Port Functions ..............................................................................................................................................71 4-2 Configuration of Port ....................................................................................................................................72 4-3 Port Mode Register and Output Latch Settings When ...

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Table No. 13-2 Operation Mode Settings of Serial Interface 00 ..........................................................................................178 13-3 Example of Relationship Between Main System Clock and Baud Rate......................................................181 13-4 Relationship Between ASCK Pin Input Frequency and Baud Rate (When BRGC00 Is Set to 80H)...........182 13-5 Example ...

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Features • ROM and RAM capacities Item Part Number PD789405A, 789415A ROM PD789406A, 789416A PD789407A, 789417A PD78F9418A Flash memory • Minimum instruction execution time can be changed from high speed (0 5.0 MHz operation with main system ...

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Ordering Information Part Number PD789405AGC-xxx-8BT PD789405AGK-xxx-9EU PD789406AGC-xxx-8BT PD789406AGK-xxx-9EU PD789407AGC-xxx-8BT PD789407AGK-xxx-9EU PD789415AGC-xxx-8BT PD789415AGK-xxx-9EU PD789416AGC-xxx-8BT PD789416AGK-xxx-9EU PD789417AGC-xxx-8BT PD789417AGK-xxx-9EU PD78F9418AGC-8BT PD78F9418AGK-9EU PD789405AGC-xxx-8BT-A PD789405AGK-xxx-9EU-A PD789406AGC-xxx-8BT-A PD789406AGK-xxx-9EU-A PD789407AGC-xxx-8BT-A PD789407AGK-xxx-9EU-A PD789415AGC-xxx-8BT-A PD789415AGK-xxx-9EU-A PD789416AGC-xxx-8BT-A PD789416AGK-xxx-9EU-A PD789417AGC-xxx-8BT-A PD789417AGK-xxx-9EU-A PD78F9418AGC-8BT-A PD78F9418AGK-9EU-A Remarks 1. xxx indicates ROM code suffix. ...

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Pin Configuration (Top View) • 80-pin plastic QFP (14 14) x • 80-pin plastic TQFP (fine pitch) ( ...

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ANI0 to ANI6: Analog input ASCK: Asynchronous serial input AV : Analog power supply Analog reference voltage REF AV : Analog ground SS BIAS: LCD power supply bias control CMPIN0: Comparator input CMPREF0: Comparator reference CMPTOUT0: Comparator ...

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Series Lineup The products in the 78K/0S Series are listed below. The names enclosed in boxes are subseries names. Small-scale package, general-purpose applications 44-pin PD789046 42-/44-pin PD789026 30-pin PD789088 30-pin PD789074 28-pin PD789014 20-pin PD789062 20-pin PD789052 Small-scale ...

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The major functional differences between the subseries are listed below. Series for general-purpose applications and LCD drive Function ROM Capacity Subseries 8-Bit 16-Bit Watch WDT (Bytes) Small- PD789046 scale PD789026 package, ...

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Series for ASSP Function ROM Capacity Subseries 8-Bit 16-Bit Watch WDT (Bytes) USB PD789800 Inverter PD789842 Note control On-chip PD789850 bus controller ...

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Block Diagram 8-bit timer TI0/P24 event/counter 00 8-bit timer TI1/P25 event/counter 01 TO2/P23 8-bit timer 02 TO5/P26 16-bit timer 50 CPT5/P27 Watch timer Watchdog timer SCK/ASCK/P20 Serial SO/TxD/P21 interface SI/RxD/P22 ANI0/P60 ANI1/P61 ANI2/P62 to ANI6/P66 A/D converter AV DD ...

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Overview of Functions Part Number Item Internal memory ROM High-speed RAM LCD data RAM Minimum instruction execution time General-purpose registers Instruction set I/O ports A/D converters Comparator Serial interface LCD controller/driver Timers Timer output Maskable Vectored interrupt sources Non-maskable ...

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An outline of the timer is shown below. Operation Interval timer mode External event counter Function Timer outputs Square-wave outputs Capture Interrupt sources Notes 1. The watch timer can perform both watch timer and interval timer functions at the same ...

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List of Pin Functions (1) Port pins Pin Name I/O P00 to P03 I/O Port 0. 4-bit I/O port. Input/output can be specified in 1-bit units. When used as an input port, use of an on-chip pull-up resistor can ...

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Non-port pins (1/2) Pin Name I/O INTP0 Input External interrupt input for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified INTP1 INTP2 INTP3 KR0 to KR5 Input Key return signal ...

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Non-port pins (2/2) Pin Name I/O V Positive power supply for ports DD0 V Positive power supply for circuits other than ports DD1 V Ground potential for ports SS0 V Ground potential of circuits other than ports SS1 IC ...

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Description of Pin Functions 2.2.1 P00 to P03 (Port 0) These pins constitute a 4-bit I/O port and can be set to input or output port mode in 1-bit units by using port mode register 0 (PM0). When these ...

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INTP0 to INTP3 These are external interrupt input pins for which a valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. (j) CMPTOUT0 This is the comparator output pin. Caution When using P20 ...

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P80 to P87 (Port 8) These pins constitute an 8-bit I/O port. controller/driver segment signal. The following operation modes can be specified in 1-bit units. (1) Port mode In this port mode, P80 to P87 function as an 8-bit ...

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AV SS This pin is the A/D converter ground potential pin. Always keep it at the same potential as the V the A/D converter is not used). 2.2.15 RESET This pin inputs an active-low system reset signal. 2.2.16 X1, ...

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IC (mask ROM version only) The IC (internally connected) pin is used to set the PD789407A and PD789417A Subseries in the test mode before shipment. In the normal operation mode, directly connect this pin to the V length as ...

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Pin I/O Circuits and Recommended Connection of Unused Pins The I/O circuit type of each pin and recommended connection of unused pins are shown in Table 2-1. For the I/O circuit configuration of each type, see Figure 2-1. Pin ...

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Type 2 IN Schmitt-triggered input with hysteresis characteristics Type 5-H Pull-up enable V DD0 Data Output N-ch disable V SS0 Input enable Type 8-C Pull-up enable V DD0 Data P-ch Output N-ch disable V SS0 Type 9-C P-ch IN N-ch ...

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Type 17-B V LC0 P-ch V LC1 N-ch P-ch SEG data N-ch P-ch V LC2 N-ch V SS1 Type 18-A V LC0 P-ch V LC1 N-ch P-ch N-ch N-ch P-ch COM data P-ch V LC2 N-ch V SS1 CHAPTER 2 ...

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Memory Space The PD789407A and PD789417A Subseries can access memory space. Figures 3-1 through 3-4 show the memory maps. Figure 3-1. Memory Map ( PD789405A and PD789415A) FFFFH Special function registers FF00H FEFFH Internal high-speed RAM ...

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Figure 3-2. Memory Map ( PD789406A and PD789416A) FFFFH Special function registers FF00H FEFFH Internal high-speed RAM FD00H FCFFH FA1CH FA1BH RAM space for LCD data Data FA00H memory space F9FFH 4000H 3FFFH Program 16384 memory space 0000H CHAPTER 3 ...

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Figure 3-3. Memory Map ( PD789407A and PD789417A) FFFFH Special function registers FF00H FEFFH Internal high-speed RAM FD00H FCFFH FA1CH FA1BH RAM space for LCD data Data FA00H memory space F9FFH 6000H 5FFFH Program memory space 0000H 46 CHAPTER 3 ...

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Figure 3-4. Memory Map ( PD78F9418A) FFFFH Special function registers FF00H FEFFH Internal high-speed RAM FD00H FCFFH FA1CH FA1BH RAM space for LCD data Data FA00H memory space F9FFH 8000H 7FFFH Program memory space 0000H CHAPTER 3 CPU ARCHITECTURE 256 ...

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Internal program memory space The internal program memory space stores programs and table data. This space is usually addressed by the program counter (PC). The products in the PD789407A and memory) capacities. Part Number PD789405A, 789415A PD789406A, 789416A PD789407A, ...

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Internal data memory space The PD789407A and PD789417A Subseries products incorporate the following RAM: (1) Internal high-speed RAM An internal high-speed RAM is allocated to the area between FD00H and FEFFH. The internal high-speed RAM is also used as ...

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Data memory addressing The PD789407A and PD789417A Subseries are provided with a variety of addressing modes to make memory manipulation as efficient as possible. In the area that holds data memory (FD00H to FFFFH) especially, specific modes of addressing ...

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CHAPTER 3 CPU ARCHITECTURE Figure 3-6. Data Memory Addressing ( PD789406A and PD789416A) FFFFH Special function registers (SFR) 256 8 bits FF20H FF1FH FF00H FEFFH Internal high-speed RAM 512 8 bits FE20H FE1FH FD00H FCFFH Reserved FA1CH FA1BH RAM space ...

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Figure 3-7. Data Memory Addressing ( PD789407A and PD789417A) FFFFH Special function registers (SFR) 256 8 bits FF20H FF1FH FF00H FEFFH Internal high-speed RAM 512 8 bits FE20H FE1FH FD00H FCFFH Reserved FA1CH FA1BH RAM space for LCD data 28 ...

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CHAPTER 3 CPU ARCHITECTURE Figure 3-8. Data Memory Addressing ( PD78F9418A) FFFFH Special function registers (SFR) 256 8 bits FF20H FF1FH FF00H FEFFH Internal high-speed RAM 512 8 bits FE20H FE1FH FD00H FCFFH Reserved FA1CH FA1BH RAM space for LCD ...

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Processor Registers The PD789407A and PD789417A Subseries are provided with the following on-chip processor registers. 3.2.1 Control registers The control registers contains special functions to control the program sequence statuses and stack memory. A program counter, a program status ...

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CHAPTER 3 CPU ARCHITECTURE (a) Interrupt enable flag (IE) This flag controls the interrupt request acknowledgment operations of the CPU. When set to the interrupt disable status (DI), and all interrupt requests other than non-maskable interrupts are ...

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Stack pointer (SP) This is a 16-bit register used to hold the start address of the memory stack area. Only the internal high- speed RAM area can be set as the stack area SP15 SP14 SP13 SP12 ...

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General-purpose registers The general-purpose registers consist of eight 8-bit registers ( and H). Each register can be used as an 8-bit register, and two 8-bit registers can be used in pairs as a ...

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Special function registers (SFR) Unlike a general-purpose register, each special function register has a special function. SFRs are allocated in the 256-byte area FF00H to FFFFH. A special function register can be manipulated, like a general-purpose register, using operation, ...

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Table 3-3. Special Function Register List (1/2) Address Special Function Register (SFR) Name FF00H Port 0 FF02H Port 2 FF04H Port 4 FF05H Port 5 FF06H Port 6 FF08H Port 8 FF09H Port 9 FF10H Transmit shift register 00 Receive ...

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Table 3-3. Special Function Register List (2/2) Address Special Function Register (SFR) Name FF50H 8-bit compare register 00 FF51H 8-bit timer counter 00 FF53H 8-bit timer mode control register 00 FF54H 8-bit compare register 01 FF55H 8-bit timer counter 01 ...

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Instruction Address Addressing An instruction address is determined by program counter (PC) contents. PC contents are normally incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each time another instruction ...

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Immediate addressing [Function] Immediate data in the instruction word is transferred to the program counter (PC) and branched. This function is carried out when the CALL !addr16 or BR !addr16 instruction is executed. The CALL !addr16 and BR !addr16 ...

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Table indirect addressing [Function] The table contents (branch destination address) of the particular location to be addressed by the lower 5-bit immediate data of an instruction code from bit 1 to bit 5 are transferred to the program counter ...

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Operand Address Addressing The following methods are available to specify the register and memory (addressing) to undergo manipulation during instruction execution. 3.4.1 Direct addressing [Function] The memory indicated with immediate data in an instruction word is directly addressed. [Operand ...

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Short direct addressing [Function] The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word. The fixed space is the 256-byte space FE20H to FF1FH where the addressing is applied. An ...

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Special function register (SFR) addressing [Function] A memory-mapped special function register (SFR) is addressed with 8-bit immediate data in an instruction word. This addressing is applied to the 240-byte spaces FF00H to FFCFH and FFE0H to FFFFH. However, the ...

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Register addressing [Function] In the register addressing mode, general-purpose registers are accessed as operands. The general-purpose register to be accessed is specified by the register specification code or functional name in the instruction code. Register addressing is carried out ...

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Register indirect addressing [Function] In the register indirect addressing mode, memory is manipulated according to the contents of a register pair specified as an operand. The register pair to be accessed is specified by the register pair specification code ...

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Based addressing [Function] 8-bit immediate data is added to the contents of the base register, that is, the HL register pair, and the sum is used to address the memory. Addition is performed by expanding the offset data as ...

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Function of Port The PD789407A and PD789417A Subseries are provided with the ports shown in Figure 4-1, enabling various methods of control. Numerous other functions are provided that can be used in addition to the digital I/O port function. ...

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Pin Name I/O P00 to P03 I/O Port 0. 4-bit I/O port. Input/output can be specified in 1-bit units. When used as an input port, use of an on-chip pull-up resistor can be specified by setting pull-up resistor option register ...

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Configuration of Ports The ports consist of the following hardware. Item Control registers Port mode registers (PMm Pull-up resistor option registers (PUm Ports Total: 43 (input: ...

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Port 2 This is an 8-bit I/O port with an output latch. Port 2 can be specified as input or output in 1-bit units by using port mode register 2 (PM2). When using the P20 to P27 pins as ...

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WR PU1 PU121 RD WR PORT Output latch (P21 PM21 Alternate function PU1: Pull-up resistor option register 1 PM: Port mode register RD: Port 2 read signal WR: Port 2 write signal 74 CHAPTER 4 PORT FUNCTIONS Figure ...

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CHAPTER 4 PORT FUNCTIONS Figure 4-5. Block Diagram of P22 and P24 WR PU1 PU122, PU124 Alternate function RD WR PORT Output latch (P22, P24 PM22, PM24 PU1: Pull-up resistor option register 1 PM: Port mode register RD: ...

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WR PU1 PU123 RD WR PORT Output latch (P23) OPDR WR PM PM23 Alternate function Alternate function OPDR: Bit 1 of comparator mode register 0, selection of N-ch open-drain output PU1: Pull-up resistor option register 1 PM: Port mode register ...

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CHAPTER 4 PORT FUNCTIONS Figure 4-7. Block Diagram of P25 to P27 WR PU1 PU125 to PU127 Alternate function RD WR PORT Output latch (P25 to P27 PM25 to PM27 Alternate function PU1: Pull-up resistor option register 1 ...

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Port 4 This is an 8-bit I/O port with an output latch. Port 4 can be specified as input or output in 1-bit units by using port mode register 4 (PM4). When using the P40 to P47 pins as ...

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CHAPTER 4 PORT FUNCTIONS Figure 4-9. Block Diagram of P46 and P47 WR PU0 PU04 RD WR PORT Output latch (P46, P47 PM46, PM47 PU0: Pull-up resistor option register 0 PM: Port mode register RD: Port 4 read ...

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Port 5 This is a 4-bit N-ch open-drain I/O port with an output latch. Port 5 can be specified as input or output in 1-bit units by using port mode register 5 (PM5). For a mask ROM version, whether ...

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Port 6 This is a 7-bit input port. Port 6 is also used as an analog input to the A/D converter or comparator input. Port 6 is set to input mode when the RESET signal is input. Figures 4-11 ...

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Figure 4-12. Block Diagram of P62 to P66 RD A/D converter 82 CHAPTER 4 PORT FUNCTIONS + – V REF User’s Manual U13952EJ3V1UD P62/ANI2 to P66/ANI6 ...

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Port 8 This is an 8-bit I/O port with an output latch. Port 8 can be specified as input or output in 1-bit units by using port mode register 8 (PM8). When using the P80 to P87 pins as ...

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Port 9 This is a 4-bit I/O port with an output latch. Port 9 can be specified as input or output in 1-bit units by using port mode register 9 (PM9). When using the P90 to P93 pins as ...

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Registers Controlling Ports The following two registers control the ports. Port mode registers (PM0, PM2, PM4, PM5, PM8, and PM9) Pull-up resistor option registers (PU0 to PU2) (1) Port mode registers (PM0, PM2, PM4, PM5, PM8, and PM9) These ...

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Figure 4-15. Format of Port Mode Register Symbol PM0 PM03 PM2 PM27 PM26 PM25 PM24 PM23 PM4 PM47 PM46 PM45 PM44 PM43 PM53 PM5 PM87 PM86 PM85 PM84 ...

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Figure 4-17. Format of Pull-Up Resistor Option Register 1 Symbol <7> <6> <5> <4> <3> PU1 PU127 PU126 PU125 PU124 PU123 PU122 PU121 PU120 PU12m 0 On-chip pull-up resistor not used 1 On-chip pull-up resistor used Note PU1 selects whether ...

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Operation of Ports The operation of a port differs depending on whether the port is set in the input or output mode, as described below. 4.4.1 Writing to I/O port (1) In output mode A value can be written ...

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Functions of Clock Generator The clock generator generates the clock to be supplied to the CPU and peripheral hardware. The following two types of system clock oscillators are used. Main system clock oscillator This circuit oscillates at 1.0 to ...

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Figure 5-1. Block Diagram of Clock Generator Internal bus FRC SCC Suboscillation mode register Subsystem XT1 f XT clock XT2 oscillator X1 Main system clock X2 oscillator f X STOP Processor clock control register (PCC) 90 CHAPTER 5 CLOCK GENERATOR ...

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Registers Controlling Clock Generator The clock generator is controlled by the following registers. Processor clock control register (PCC) Suboscillation mode register (SCKM) Subclock control register (CSS) (1) Processor clock control register (PCC) PCC selects the CPU clock and sets ...

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Suboscillation mode register (SCKM) SCKM selects whether a feedback resistor is used for the subsystem clock, and controls the oscillation of the clock. SCKM is set using a 1-bit or 8-bit memory manipulation instruction. RESET input sets SCKM to ...

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Subclock control register (CSS) CSS specifies whether the main system or subsystem clock oscillator selected. It also specifies how the CPU clock operates. CSS is set using a 1-bit or 8-bit memory manipulation instruction. RESET input ...

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System Clock Oscillators 5.4.1 Main system clock oscillator The main system clock oscillator is oscillated by a crystal or ceramic resonator (5.0 MHz TYP.) connected across the X1 and X2 pins. An external clock can also be input to ...

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Subsystem clock oscillator The subsystem clock oscillator is oscillated by a crystal resonator (32.768 kHz TYP.) connected across the XT1 and XT2 pins. An external clock can also be input to the circuit. In this case, input the clock ...

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Examples of incorrect resonator connection Figure 5-7 shows examples of incorrect resonator connection. Figure 5-7. Examples of Incorrect Resonator Connection (1/2) (a) Too long wiring V , SS0 V X1 SS1 (c) Wiring near high fluctuating current V , ...

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Figure 5-7. Examples of Incorrect Resonator Connection (2/2) (e) Signal is fetched V , SS0 V X1 SS1 Remark When using the subsystem clock, read X1 and X2 as XT1 and XT2, respectively, and connect resistors to the XT2 side ...

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Operation of Clock Generator The clock generator generates the following clocks and controls the operation modes of the CPU, such as the standby mode. Main system clock f X Subsystem clock f XT CPU clock f CPU Clock to ...

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Changing Setting of System Clock and CPU Clock 5.6.1 Time required for switching between system clock and CPU clock The CPU clock can be selected by using bit 1 (PCC1) of the processor clock control register (PCC) and bit ...

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Switching between system clock and CPU clock The following figure illustrates how the CPU clock and system clock are switched. Figure 5-8. Switching Between System Clock and CPU Clock V DD RESET Interrupt request signal System clock CPU clock ...

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In addition, the count value can be captured by a trigger pin. 6.1 Function of 16-Bit Timer 50 16-bit timer 50 has the ...

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Configuration of 16-Bit Timer 50 16-bit timer 50 consists of the following hardware. Table 6-1. Configuration of 16-Bit Timer 50 Item 16 bits 1 (TM50) Timer counter Registers Compare register: 16 bits Capture register: Timer outputs 1 (TO5) Control ...

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This register compares the value set to CR50 with the count value of 16-bit timer counter 50 (TM50), and when they match, generates an interrupt request (INTTM50). CR50 is set using a 16-bit memory ...

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Registers Controlling 16-Bit Timer 50 The following two registers are used to control 16-bit timer 50. 16-bit timer mode control register 50 (TMC50) Port mode register 2 (PM2) (1) 16-bit timer mode control register 50 (TMC50) 16-bit timer mode ...

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Figure 6-2. Format of 16-Bit Timer Mode Control Register 50 7 <6> Symbol TMC50 TOD50 TOF50 CPT501 CPT500 TOC50 TCL501 TCL500 TOE50 TOD50 0 Timer output is “0” 1 Timer output is “1” TOF50 0 Clear by ...

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Port mode register 2 (PM2) This register sets input/output of port 2 in 1-bit units. To use the P26/INTP2/TO5 pin for timer output, set PM26 and the output latch of P26 to 0. PM2 is set using a 1-bit ...

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Operation of 16-Bit Timer 50 6.4.1 Operation as timer interrupt In the timer interrupt function, interrupts are repeatedly generated at the count value set to 16-bit compare register 50 (CR50) in advance at the interval set in TCL501 and ...

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Figure 6-5. Timing of Timer Interrupt Operation t Count clock TM50 count value 0000H 0001H CR50 N INTTM50 TO5 TOF50 Remark N = 0000H to FFFFH 108 CHAPTER 6 16-BIT TIMER 50 N FFFFH 0000H 0001H N N Interrupt acknowledged ...

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Operation as timer output Timer outputs are repeatedly generated at the count value set to 16-bit compare register 50 (CR50) in advance at the interval set in TCL501 and TCL500. To operate 16-bit timer as a timer output, the ...

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Capture operation In a capture operation, the count value of 16-bit timer counter 50 (TM50) is captured and latched to the capture register in synchronization with a capture trigger. Set as shown in Figure 6-8 to allow the 16-bit ...

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The count value of 16-bit timer counter 50 (TM50) is read out by a 16-bit manipulation instruction. TM50 readout is performed via a 16-bit counter read buffer. The 16-bit counter read buffer latches the ...

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Cautions on Using 16-Bit Timer 50 6.5.1 Restrictions when rewriting 16-bit compare register 50 (1) Disable interrupts (TMMK50 = 1) and the inversion control of timer output (TOC50 = 0) before rewriting the compare register (CR50). If CR50 is ...

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B> When rewriting using 16-bit access <1> Disable interrupts (TMMK50 = 1) and the inversion control of timer output (TOC50 = 0). <2> Rewrite CR50 (16 bits). <3> Wait for one cycle or more of the count clock. <4> ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 7.1 Function of 8-Bit Timer/Event Counters 8-bit timer/event counters have the following functions. Interval timer (timer 00, timer 01, and timer 02) External event counter (timer ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS (2) External event counter The number of pulses of an externally input signal can be measured. (3) Square-wave output A square wave of any frequency can be output. Table 7-4. Square-Wave Output ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS Figure 7-1. Block Diagram of 8-Bit Timer/Event Counter TI0/P24/INTP0 2 Figure 7-2. Block Diagram of 8-Bit Timer/Event Counter ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS Figure 7-3. Block Diagram of 8-Bit Timer 02 8-bit compare register 02 (CR02) Match 8-bit timer counter (TM02 Internal bus ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 7.3 Registers Controlling 8-Bit Timer/Event Counters The following two registers are used to control 8-bit timer/event counters 00 to 02. 8-bit timer mode control registers 00, 01, and 02 ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS (2) 8-bit timer mode control register 01 (TMC01) TMC01 determines whether to enable or stop operation of 8-bit timer counter 01 (TM01) and specifies the count clock for 8-bit timer/event counter 01. ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS (3) 8-bit timer mode control register 02 (TMC02) TMC02 determines whether to enable or stop operation of 8-bit timer counter 02 (TM02) and specifies the count clock for 8-bit timer 02. It ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS (4) Port mode register 2 (PM2) This register sets port 2 to input/output in 1-bit units. When using the P23/COMPTOUT0/TO2 pin for timer output, set PM23 and the output latch of P23 ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 7.4 Operation of 8-Bit Timer/Event Counters 7.4.1 Operation as interval timer The interval timer repeatedly generates an interrupt at time intervals specified by the count value set to 8-bit ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS Table 7-8. Interval Time of 8-Bit Timer 02 TCL021 TCL020 Minimum Interval Time (1 (25 1/f ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS Figure 7-9. Interval Timer Operation Timing of Timer 02 t Count clock TM02 count value 00 01 CR02 N TCE02 Count start INTTM02 TO2 Interval time Remark Interval time = (N + ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 7.4.2 Operation as external event counter (timer 00 and timer 01 only) The external event counter counts the number of external clock pulses input to the TI0/P24/INTP0 and TI1/P25/INTP1 pins by using ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 7.4.3 Operation as square-wave output (timer 02 only) The 8-bit timer can generate a square-wave output of any frequency at intervals specified by the count value preset to 8-bit compare register 02 ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS Figure 7-11. Square-Wave Output Timing Count clock TM02 count value 00 01 CR02 N TCE02 Count start INTTM02 Note TO2 Note The initial value of TO2 when output is enabled (TOE02 = ...

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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 7.5 Cautions on Using 8-Bit Timer/Event Counters (1) Error on starting timer An error clock occurs after the timer has been started until a match ...

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Functions of Watch Timer The watch timer has the following functions. • Watch timer • Interval timer The watch and interval timers can be used at the same time. Figure 8 block diagram of the watch timer. ...

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Watch timer The 4.19 MHz main system clock or 32.768 kHz subsystem clock is used to issue an interrupt request (INTWT) at 0.5-second intervals. Caution When the main system clock is operating at 5.0 MHz, it cannot be used ...

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Register Controlling Watch Timer The watch timer mode control register (WTM) is used to control the watch timer. • Watch timer mode control register (WTM) WTM selects a count clock for the watch timer and specifies whether to enable ...

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Operation of Watch Timer 8.4.1 Operation as watch timer The main system clock (4.19 MHz) or subsystem clock (32.768 kHz) is used as a watch timer that generates interrupts at 0.5-second intervals. By setting bits 0 and 1 (WTM0 ...

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Figure 8-3. Watch Timer/Interval Timer Operation Timing 5-bit counter 0H Start Count clock Watch timer interrupt INTWT Watch timer interrupt time (0.5 s) Interval timer interrupt INTWTI Interval timer (T) Remark f : Watch timer clock ...

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Functions of Watchdog Timer The watchdog timer has the following functions. Watchdog timer Interval timer Caution Select the watchdog timer mode or interval timer mode by using the watchdog timer mode register (WDTM). (1) Watchdog timer The watchdog timer ...

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Configuration of Watchdog Timer The watchdog timer consists of the following hardware. Table 9-3. Configuration of Watchdog Timer Item Control registers Timer clock selection register 2 (TCL2) Watchdog timer mode register (WDTM) Figure 9-1. Block Diagram of Watchdog Timer ...

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Registers Controlling Watchdog Timer The following two registers are used to control the watchdog timer. Timer clock selection register 2 (TCL2) Watchdog timer mode register (WDTM) (1) Timer clock selection register 2 (TCL2) This register sets the watchdog timer ...

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Watchdog timer mode register (WDTM) This register sets the operation mode of the watchdog timer, and enables/disables counting of the watchdog timer. WDTM is set using a 1-bit or 8-bit memory manipulation instruction. RESET input sets WDTM to 00H. ...

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Operation of Watchdog Timer 9.4.1 Operation as watchdog timer The watchdog timer detects an inadvertent program loop when bit 4 (WDTM4) of the watchdog timer mode register (WDTM) is set to 1. The count clock (program loop detection time ...

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Operation as interval timer When bit 4 (WDTM4) and bit 3 (WDTM3) of the watchdog timer mode register (WDTM) are set to 0 and 1, respectively, the watchdog timer also operates as an interval timer that repeatedly generates an ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) 10.1 Function of 8-Bit A/D Converter The 8-bit A/D converter converts input analog voltages to digital signals with an 8-bit resolution. It can control up to seven analog input channels (ANI0 to ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) Figure 10-1. Block Diagram of 8-Bit A/D Converter ANI0/P60 ANI1/P61 ANI2/P62 ANI3/P63 ANI4/P64 ANI5/P65 ANI6/P66 3 ADS02 ADS01 ADS00 ADCS0 FR02 FR01 FR00 A/D input selection register 0 (ADS0) (1) Successive approximation ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) (5) Series resistor string The series resistor string is configured between AV which analog inputs are compared. (6) ANI0 to ANI6 pins The ANI0 to ANI6 pins are analog input pins for ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) 10.3 Registers Controlling 8-Bit A/D Converter The following two registers are used to control the 8-bit A/D converter. • A/D converter mode register 0 (ADM0) • A/D input selection register 0 (ADS0) ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) (2) A/D input selection register 0 (ADS0) ADS0 register specifies the port used to input the analog voltages to be converted to a digital signal. ADS0 is set using a 1-bit or ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) 10.4 Operation of 8-Bit A/D Converter 10.4.1 Basic operation of 8-bit A/D converter <1> Select a channel for A/D conversion, using A/D input selection register 0 (ADS0). <2> The voltage supplied to ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) Figure 10-4. Basic Operation of 8-Bit A/D Converter Sampling time A/D converter Sampling operation Undefined SAR 80H ADCR0 INTAD0 A/D conversion continues until bit 7 (ADCS0) of A/D converter mode register 0 ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) Figure 10-5. Relationship Between Analog Input Voltage and A/D Conversion Result 255 254 253 A/D conversion result (ADCR0 512 256 512 User’s Manual U13952EJ3V1UD 2 ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) 10.4.3 Operation mode of 8-bit A/D converter The 8-bit A/D converter is initially in the select mode. In this mode, A/D input selection register 0 (ADS0) is used to select an analog ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) 10.5 Cautions on Using 8-Bit A/D Converter (1) Current consumption in the standby mode When the A/D converter enters the standby mode, it stops operating. Stopping conversion (bit 7 (ADCS0) of A/D ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) Figure 10-8. Conversion Result Readout Timing (When Conversion Result Is Undefined Value) A/D conversion end ADCR0 INTAD0 ADCS0 Normal conversion result read out Figure 10-9. Conversion Result Readout Timing (When Conversion Result ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) Figure 10-10. Analog Input Pin Processing Reference voltage input C = 100 to 1000 pF (7) ANI0 to ANI6 The analog input pins (ANI0 to ANI6) are alternate-function pins. They are also ...

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CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES) (10) Interrupt request flag (ADIF0) Changing the contents of A/D converter mode register 0 (ADM0) does not clear the interrupt request flag (ADIF0). If the voltage at the analog input pins is ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) 11.1 Function of 10-Bit A/D Converter The 10-bit A/D converter converts input analog voltages to digital signals with a 10-bit resolution. It can control up to seven analog input channels (ANI0 to ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) Figure 11-1. Block Diagram of 10-Bit A/D Converter ANI0/P60 ANI1/P61 ANI2/P62 ANI3/P63 ANI4/P64 ANI5/P65 ANI6/P66 3 ADS02 ADS01 ADS00 ADCS0 FR02 FR01 FR00 A/D input selection register 0 (ADS0) (1) Successive approximation ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) (3) Sample & hold circuit The sample & hold circuit samples consecutive analog inputs from the input circuit, one by one, and sends them to the voltage comparator. The sampled analog input ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) 11.3 Registers Controlling 10-Bit A/D Converter The following two registers are used to control the 10-bit A/D converter. • A/D converter mode register 0 (ADM0) • A/D input selection register 0 (ADS0) ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) (2) A/D input selection register 0 (ADS0) ADS0 register specifies the port used to input the analog voltages to be converted to a digital signal. ADS0 is set using a 1-bit or ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) 11.4 Operation of 10-Bit A/D Converter 11.4.1 Basic operation of 10-bit A/D converter <1> Select a channel for A/D conversion, using A/D input selection register 0 (ADS0). <2> The voltage supplied to ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) Figure 11-4. Basic Operation of 10-Bit A/D Converter Sampling time A/D converter Sampling operation C0H 80H SAR Undefined or 40H ADCR0 INTAD0 A/D conversion continues until bit 7 (ADCS0) of A/D converter ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) 11.4.2 Input voltage and conversion result The relationship between the analog input voltage at the analog input pins (ANI0 to ANI6) and the A/D conversion result (A/D conversion result register 0 (ADCR0)) ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) 11.4.3 Operation mode of 10-bit A/D converter The 10-bit A/D converter is initially in the select mode. In this mode, A/D input selection register 0 (ADS0) is used to select an analog ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) 11.5 Cautions on Using 10-Bit A/D Converter (1) Current consumption in the standby mode When the A/D converter enters the standby mode, it stops operating. Setting the bit 7 (ADCS0) of A/D ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) Figure 11-8. Conversion Result Readout Timing (When Conversion Result Is Undefined Value) A/D conversion end ADCR0 INTAD0 ADCS0 Normal conversion result read out Figure 11-9. Conversion Result Readout Timing (When Conversion Result ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) Figure 11-10. Analog Input Pin Processing Reference voltage input C = 100 to 1000 pF (7) ANI0 to ANI6 The analog input pins (ANI0 to ANI6) are alternate-function pins. They are also ...

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CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES) (10) Interrupt request flag (ADIF0) Changing the contents of A/D converter mode register 0 (ADM0) does not clear the interrupt request flag (ADIF0). If the voltage at the analog input pins is ...

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Functions of Comparator The comparator has the following functions. (1) Input voltage comparison by comparator The comparator compares an input voltage at the reference voltage input pin (CMPREF0) with an input voltage at the comparator input pin (CMPIN0). manipulation ...

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Configuration of Comparator The comparator consists of the following hardware. (1) CMPIN0 This is the comparator input pin. (2) CMPTOUT0 This is the comparator output pin. (3) CMPREF0 This is the comparator reference voltage input pin. Figure 12-1 is ...

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Register Controlling Comparator The comparator is controlled by the following register. (1) Comparator mode register 0 (CMPRM0) CMPRM0 controls the power supply and clock output of the comparator. It also selects an open-drain output for the comparator. CMPRM0 is ...

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Operation of Comparator The output of 8-bit timer 02 (TM02) can be controlled and directed to the CMPTOUT0/P23/TO2 pin via the comparator. To run the comparator, set as follows: Set P23 to output mode (PM23 = 0). Set comparator ...

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Figure 12-5. Comparator Operation Timing (1/2) Timer (TM02) output CMPOUT0 CMPTOUT0 SELCMP0 Timer (TM02) output enable signal <1> CMPOUT0 is latched on the rising edge of the TM02 output to generate a signal to enable output to the CMPTOUT0/P23/TO2 pin. ...

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CHAPTER 13 SERIAL INTERFACE 00 13.1 Functions of Serial Interface 00 Serial interface 00 has the following three modes. Operation stopped mode Asynchronous serial interface (UART) mode 3-wire serial I/O mode (1) Operation stopped mode This mode is used to ...

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Configuration of Serial Interface 00 Serial interface 00 consists of the following hardware. Table 13-1. Configuration of Serial Interface 00 Item Registers Transmit shift register 00 (TXS00) Receive shift register 00 (RXS00) Receive buffer register 00 (RXB00) Control registers ...

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Receive buffer register 00 (RXB00/SIO00) Direction controller Receive shift RxD/SI/P22 register 00 (RXS00) TxD/SO/P21 PM21 Receive controller PM20 ASCK/SCK/P20 Serial operation mode register 00 (CSIM00) Note For the baud rate generator configuration, see Figure 13-2. Figure 13-1. Block Diagram of ...

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BRGC00 write TXE00 Transmit clock 1/2 Receive clock 1/2 Clear CSCK00 CSIE00 RXE00 CSIE00 Start bit detection BRGC00 write RXE00 Figure 13-2. Block Diagram of Baud Rate Generator Clear Clear 3-bit counter 4 3-bit counter Clear TPS003 TPS002 TPS001 TPS000 ...

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CHAPTER 13 SERIAL INTERFACE 00 (1) Transmit shift register 00 (TXS00) This register is used to specify data to be transmitted. Data written to TXS00 is transmitted as serial data. If the data length is specified as 7 bits, bits ...

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Registers Controlling Serial Interface 00 The following four registers are used to control serial interface 00. Serial operation mode register 00 (CSIM00) Asynchronous serial interface mode register 00 (ASIM00) Asynchronous serial interface status register 00 (ASIS00) Baud rate generator ...

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CHAPTER 13 SERIAL INTERFACE 00 (2) Asynchronous serial interface mode register 00 (ASIM00) This register is set when using serial interface 00 in the asynchronous serial interface mode. ASIM00 is set using a 1-bit or 8-bit memory manipulation instruction. RESET ...

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Table 13-2. Operation Mode Settings of Serial Interface 00 (1) Operation stopped mode ASIM00 CSIM00 PM22 P22 CSCK00 TXE00 RXE00 CSIE00 DIR00 Note 1 Note Other than above (2) Asynchronous serial interface ...

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Asynchronous serial interface status register 00 (ASIS00) This register indicates the type of error when a reception error occurs in the asynchronous serial interface mode. ASIS00 is read using a 1-bit or 8-bit memory manipulation instruction. The contents of ...

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Baud rate generator control register 00 (BRGC00) This register is used to set the serial clock of serial interface 00. BRGC00 is set using an 8-bit memory manipulation instruction. RESET input sets BRGC00 to 00H. Figure 13-6. Format of ...

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CHAPTER 13 SERIAL INTERFACE 00 The baud rate transmit/receive clock to be generated is either a signal divided from the main system clock signal divided from the clock input from the ASCK pin. (a) Generation of baud rate ...

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Generation of baud rate transmit/receive clock from external clock of ASCK pin The transmit/receive clock is generated by dividing the clock input from the ASCK pin. The baud rate generated from the clock input from the ASCK pin is ...

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Operation of Serial Interface 00 Serial interface 00 has the following three modes. Operation stopped mode Asynchronous serial interface (UART) mode 3-wire serial I/O mode 13.4.1 Operation stopped mode Serial transfer is not executed in the operation stopped mode, ...

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Asynchronous serial interface mode register 00 (ASIM00) ASIM00 is set using a 1-bit or 8-bit memory manipulation instruction. RESET input sets ASIM00 to 00H. Symbol <7> <6> ASIM00 TXE00 RXE00 PS001 PS000 CL00 SL00 TXE00 0 Transmit ...

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Asynchronous serial interface (UART) mode In this mode, the one-byte data following the start bit is transmitted/received and thus full-duplex communications are possible. This device incorporates a UART-dedicated baud rate generator, enabling communication at the desired baud rate. In ...

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Asynchronous serial interface mode register 00 (ASIM00) ASIM00 is set using a 1-bit or 8-bit memory manipulation instruction. RESET input sets ASIM00 to 00H. Symbol <7> <6> ASIM00 TXE00 RXE00 PS001 PS000 CL00 SL00 TXE00 0 Transmit ...

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Asynchronous serial interface status register 00 (ASIS00) ASIS00 is read using a 1-bit or 8-bit memory manipulation instruction. RESET input sets ASIS00 to 00H. Symbol ASIS00 PE00 0 Parity ...

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Baud rate generator control register 00 (BRGC00) BRGC00 is set using an 8-bit memory manipulation instruction. RESET input sets BRGC00 to 00H Symbol BRGC00 TPS003 TPS002 TPS001 TPS000 TPS003 TPS002 TPS001 TPS000 ...

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CHAPTER 13 SERIAL INTERFACE 00 The baud rate transmit/receive clock to be generated is either a signal divided from the main system clock signal divided from the clock input from the ASCK pin. (i) Generation of baud rate ...

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Generation of baud rate transmit/receive clock from external clock of ASCK pin The transmit/receive clock is generated by dividing the clock input from the ASCK pin. The baud rate generated from the clock input from the ASCK pin is ...

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CHAPTER 13 SERIAL INTERFACE 00 (2) Communication operation (a) Data format The transmit/receive data format is as shown in Figure 13-7. One data frame consists of a start bit, character bits, parity bit and stop bit(s). The specification of character ...

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Parity types and operation The parity bit is used to detect a bit error in the communication data. Normally, the same kind of parity bit is used on the transmitting side and the receiving side. With even parity and ...

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CHAPTER 13 SERIAL INTERFACE 00 (c) Transmission A transmit operation is started by writing transmit data to transmit shift register 00 (TXS00). The start bit, parity bit and stop bit(s) are added automatically. When the transmit operation starts, the data ...

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Reception When bit 6 (RXE00) of asynchronous serial interface mode register 00 (ASIM00) is set (1), a receive operation is enabled and sampling of the RxD pin input is performed. RxD pin input sampling is performed using the serial ...

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Receive errors The following three errors may occur during a receive operation: a parity error, framing error, or overrun error. The data reception result error flag is set in asynchronous serial interface status register 00 (ASIS00). Receive error causes ...

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Reading receive data When the reception completion interrupt (INTSR00) is generated, receive data can be read by reading the value of receive buffer register 00 (RXB00). To read the receive data stored in receive buffer register 00 (RXB00), read ...

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CHAPTER 13 SERIAL INTERFACE 00 (3) Cautions on UART mode (a) When bit 7 (TXE00) of asynchronous serial interface mode register 00 (ASIM00) is cleared during transmission, be sure to set transmit shift register 00 (TXS00) to FFH, then set ...

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I/O mode The 3-wire serial I/O mode is useful for connection of peripheral I/Os and display controllers, etc., which incorporate a conventional synchronous serial interface, such as the 75XL Series, 78K Series, and 17K Series. Communication is ...

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