61298SA15Y IDT, Integrated Device Technology Inc, 61298SA15Y Datasheet

no-image

61298SA15Y

Manufacturer Part Number
61298SA15Y
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 61298SA15Y

Density
256Kb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
16b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
140mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
28
Word Size
4b
Number Of Words
64K
Lead Free Status / Rohs Status
Not Compliant
Features
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
◆ ◆ ◆ ◆ ◆
Description
as 64K x 4. It is fabricated using IDT’s high-performance, high-reliability
Functional Block Diagram
©2007 Integrated Device Technology, Inc.
64K x 4 high-speed static RAM
Fast Output Enable (OE) pin available for added system
flexibility
High speed (equal access and cycle times)
– Commercial: 12/15 ns (max.)
JEDEC standard pinout
300 mil 28-pin SOJ
Produced with advanced CMOS technology
Bidirectional data inputs and outputs
Inputs/Outputs TTL-compatible
Three-state outputs
Military product compliant to MIL-STD-883, Class B
The lDT61298SA is a 262,144-bit high-speed static RAM organized
WE
OE
CS
I/O
I/O
I/O
I/O
0
1
2
3
A
A
15
0
CONTROL
CMOS Static RAM
256K (64K x 4-Bit)
INPUT
DATA
D
E
C
O
D
E
R
1
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective approach for
memory intensive applications.
(CS) and Output Enable (OE). These two functions greatly enhance the
IDT61298SA's overall flexibility in high-speed memory applications.
a reduced power standby mode, I
considerably reduce device power requirements. This capability signifi-
cantly decreases system power and cooling levels, while greatly enhanc-
ing system reliability.
a single 5V supply. Fully static asynchronous circuitry, along with matching
access and cycle times, favor the simplified system design approach.
improved board-level packing densities.
MEMORY ARRAY
I/O CONTROL
The IDT61298SA features two memory control functions: Chip Select
Access times as fast as 12ns are available. The IDT61298SA offers
All inputs and outputs are TTL-compatible and the device operates from
The IDT61298SA is packaged in a 300 mil, 28-pin SOJ, providing
262,144-BIT
IDT61298SA/TTSA
SB1
GND
V
CC
, which enables the designer to
2971 drw 01
FEBRUARY 2007
,
DSC-2971/09

Related parts for 61298SA15Y

61298SA15Y Summary of contents

Page 1

Features ◆ ◆ ◆ ◆ ◆ 64K x 4 high-speed static RAM ◆ ◆ ◆ ◆ ◆ Fast Output Enable (OE) pin available for added system flexibility ◆ ◆ ◆ ◆ ◆ High speed (equal access and cycle times) – ...

Page 2

IDT61298SA CMOS Static RAM 256K (64K x 4-Bit) Pin Configuration SO28 ...

Page 3

IDT61298SA CMOS Static RAM 256K (64K x 4-Bit) Recommended Operating Temperature and Supply Voltage Grade Temperature O O Commercial + Electrical Characteristics ( ± 10 0.2V Symbol Dynamic ...

Page 4

IDT61298SA CMOS Static RAM 256K (64K x 4-Bit) DC Electrical Characteristics (V = 5.0V ± 10%) CC Symbol Parameter |I | Input Leakage Current Output Leakage Current LO Output Low Voltage Output High Voltage ...

Page 5

IDT61298SA CMOS Static RAM 256K (64K x 4-Bit) Timing Waveform of Read Cycle No. 1 ADDRESS OE CS DATA OUT Timing Waveform of Read Cycle No. 2 ADDRESS DATA OUT Timing Waveform of Read Cycle No DATA OUT ...

Page 6

IDT61298SA CMOS Static RAM 256K (64K x 4-Bit) Timing Waveform of Write Cycle No. 1 (WE Controlled Timing) ADDRESS DATA OUT (3) DATA IN Timing Waveform of Write Cycle No. 2 (CS Controlled Timing) ADDRESS CS ...

Page 7

IDT61298SA CMOS Static RAM 256K (64K x 4-Bit) Ordering Information IDT 61298 Device Power Speed Type XX X Package Process/ Temperature Range Blank Blank TT 6.42 7 Commercial Temperature Range Commercial (0°C to +70°C) ...

Page 8

IDT61298SA CMOS Static RAM 256K (64K x 4-Bit) Datasheet Document History 11/22/99: Updated to new format Pg. 6 Removed Note No. 1 Write Cycle No. 1 diagram, renumbered notes and footnotes Pg. 7 Added Datasheet Document History 08/09/00 Not recommended ...

Related keywords