74LCX126MTCX_NL | |
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| Manufacturer Part Number | 74LCX126MTCX_NL |
| Manufacturer | Fairchild Semiconductor |
| 74LCX126MTCX_NL datasheets |
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Availability: In stock
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Specifications of 74LCX126MTCX_NL | |||
|---|---|---|---|
| Logic Family | LCX | Logical Function | Buffer/Line Driver |
| Number Of Elements | 4 | Number Of Channels | 4 |
| Number Of Inputs | 4 | Number Of Outputs | 4 |
| Operating Supply Voltage (typ) | 2.5/3.3V | Package Type | TSSOP |
| Output Type | 3-State | Polarity | Non-Inverting |
| Propagation Delay Time | 7.8ns | High Level Output Current | -24mA |
| Low Level Output Current | 24mA | Operating Supply Voltage (max) | 3.6V |
| Operating Supply Voltage (min) | 2V | Quiescent Current | 10uA |
| Technology | CMOS | Pin Count | 14 |
| Mounting | Surface Mount | Operating Temp Range | -40C to 85C |
| Operating Temperature Classification | Industrial | Lead Free Status / Rohs Status | Compliant |
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74LCX126
Low Voltage Quad Buffer with 5V Tolerant
Inputs and Outputs
Features
5V tolerant inputs and outputs
2.3V–3.6V V
specifications provided
CC
5.5ns t
max. (V
3.3V), 10µA I
PD
CC
Power down high impedance inputs and outputs
Supports live insertion/withdrawal
±24mA output drive (V
3.0V)
CC
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds JEDEC 78 conditions
ESD performance:
– Human body model
2000V
– Machine model
100V
Leadless DQFN package
Note:
1. To ensure the high-impedance state during power up
or down, OE should be tied to V
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
Ordering Information
Package
Order Number
Number
74LCX126M
M14A
74LCX126SJ
M14D
(2)
74LCX126BQX
MLP14A
74LCX126MTC
MTC14
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©2000 Fairchild Semiconductor Corporation
74LCX126 Rev. 1.5.0
General Description
The LCX126 contains four independent non-inverting
buffers with 3-STATE outputs. Each output is disabled
when the associated output-enable (OE) input is LOW.
max.
CC
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
(1)
The 74LCX126 is fabricated with an advanced CMOS
technology to achieve high speed operation while main-
taining CMOS low power dissipation.
through a pull-up
CC
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
February 2008
www.fairchildsemi.com
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74LCX126MTCX_NL Summary of contents |
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