M30622SFP Renesas Electronics America, M30622SFP Datasheet - Page 65

• Manufacturer Part Number: M30622SFP
• Manufacturer: Renesas Electronics America

Specifications of M30622SFP

• Cpu Family: M16C
• Device Core Size: 16/32Bit
• Frequency (max): 24MHz
• Interface Type: I2C/IEBus/UART
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 4KB
• # I/os (max): 87
• Number Of Timers - General Purpose: 11
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ03B0001-0241
Figure 5.10
Memory Expansion Mode, Microprocessor Mode
(For 1- or 2-wait setting, external area access and multiplex bus selection )
Read timing
Write timing
BCLK
CSi
ADi
/DBi
ADi
BHE
ALE
RD
BCLK
CSi
ADi
/DBi
ADi
BHE
ALE
WR,WRL,
WRH
Measuring conditions
· V
· Input timing voltage : V
· Output timing voltage : V
CC1
Jan 10, 2006
=V
CC2
Timing Diagram (8)
=5V
t
d(BCLK-ALE)
t
d(BCLK-CS)
t
d(BCLK-ALE)
(0.5×t
25ns.max
t
t
t
25ns.max
t
25ns.max
t
d(BCLK-AD)
d(BCLK-CS)
25ns.max
d(BCLK-AD)
d(AD-ALE)
(0.5×t
25ns.max
25ns.max
d(AD-ALE)
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cyc
cyc
-25)ns.min
IL
-25)ns.min
Address
Address
=0.8V, V
OL
=0.4V, V
t
t
h(BCLK-ALE)
h(BCLK-ALE)
−4ns.min
−4ns.min
IH
=2.0V
OH
=2.4V
t
d(BCLK-RD)
t
t
d(BCLK-DB)
h(ALE-AD)
(0.5×t
t
40ns.max
25ns.max
25ns.max
d(BCLK-WR)
t
d(AD-WR)
0ns.min
t
t
0ns.min
cyc
dZ(RD-AD)
8ns.max
d(AD-RD)
t
-15)ns.min
cyc
t
cyc
(1.5×t
(1.5×t
Data output
t
t
d(DB-WR)
cyc
ac3(RD-DB)
cyc
-40)ns.min
-45)ns.max
t
Data input
su(DB-RD)
40ns.min
(0.5×t
(0.5×t
cyc
V
cyc
t
-10)ns.min
t
(0.5×t
h(RD-CS)
(0.5×t
t
h(BCLK-WR)
CC1
h(BCLK-RD)
-10)ns.min
(0.5×t
t
h(WR-CS)
t
0ns.min
0ns.min
t
t
5. Electrical Characteristics
h(RD-AD)
t
cyc
h(WR-AD)
h(RD-DB)
0ns.min
cyc
h(WR-DB)
cyc
-10)ns.min
-10)ns.min
-10)ns.min
=V
t
t
CC2
h(BCLK-AD)
h(BCLK-AD)
t
h(BCLK-CS)
t
4ns.min
4ns.min
h(BCLK-CS)
t
4ns.min
4ns.min
h(BCLK-DB)
4ns.min
Address
Address
=5V