M30622SFP Renesas Electronics America, M30622SFP Datasheet - Page 7

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M30622SFP

Manufacturer Part Number
M30622SFP
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M30622SFP

Cpu Family
M16C
Device Core Size
16/32Bit
Frequency (max)
24MHz
Interface Type
I2C/IEBus/UART
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
4KB
# I/os (max)
87
Number Of Timers - General Purpose
11
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30622SFP
Manufacturer:
RENESAS
Quantity:
453
M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ03B0001-0241
1.3
Figure 1.1
Figure 1.1 is a M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin version Block Diagram,
Figure 1.2 is a M16C/62P Group (M16C/62P, M16C/62PT) 80-pin version Block Diagram.
NOTES :
Internal peripheral functions
1. ROM size depends on microcomputer type.
2. RAM size depends on microcomputer type.
3. Ports P11 to P14 exist only in 128-pin version.
4. Use M16C/62PT on VCC1= VCC2.
Block Diagram
Port P11
Jan 10, 2006
Port P0
8
<VCC1 ports>
(8 bits X 2 channels)
8
(3)
Watchdog timer
Three-phase motor
Output (timer A): 5
D/A converter
Input (timer B): 6
(2 channels)
Timer (16-bit)
control circuit
M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin version Block Diagram
(15 bits)
DMAC
Port P1
Port P14
2
(4)
8
Page 5 of 96
(3)
<VCC2 ports>
Port P2
8
CRC arithmetic circuit (CCITT )
Port P12
8
Expandable up to 26 channels)
M16C/60 series16-bit CPU core
(Polynomial : X
clock synchronous serial I/O
<VCC2 ports>
R0H
R1H
(8 bits
(10 bits
(3)
A/D converter
Port P3
R2
R3
FB
A0
A1
(4)
UART or
X
R0L
R1L
X
8
3 channels)
Port P13
8 channels
8
16
+X
(4)
12
(3)
+X
Port P4
5
+1)
8
INTB
PC
SB
USP
FLG
ISP
Port P5
Clock synchronous serial I/O
PLL frequency synthesizer
generation circuit
(8 bits
8
On-chip oscillator
System clock
XCIN-XCOUT
XIN-XOUT
X
2 channels)
<VCC1 ports>
Memory
Multiplier
ROM
RAM
Port P6
(1)
(2)
8
(4)
1. Overview

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