LP3927ILQX-AJ National Semiconductor, LP3927ILQX-AJ Datasheet

LP3927ILQX-AJ

Manufacturer Part Number
LP3927ILQX-AJ
Description
Manufacturer
National Semiconductor
Type
Power Management Sysr
Datasheet

Specifications of LP3927ILQX-AJ

Output Current
200mA
Output Voltage
2.6/2.85/2.9/3V
Operating Supply Voltage (min)
3.3V
Operating Supply Voltage (typ)
3.7V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Package Type
LLP EP
Mounting
Surface Mount
Pin Count
28
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant

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Part Number:
LP3927ILQX-AJ
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© 2005 National Semiconductor Corporation
LP3927
Cellular/PCS System Power Management IC
General Description
The LP3927 system power management IC is designed for
cellular/PCS handsets as well as other portable systems that
require intelligent power management. Each device contains
five low-dropout linear regulators (LDO’s), a reset timer, a
power-up control logic, a general-purpose open drain output
that can be used to light LEDs, and a CMOS rail-to-rail
input/output operational amplifier.
Each linear regulator features an extremely low dropout
voltage of 100 mV (typ) at maximum output current. LDO1
and LDO2 are powered on and off by either the KYBD or the
VEXT pin. LDO3, LDO4 and LDO5 each have its indepen-
dent enable pin. LDO1 and LDO4 are rated at 150 mA each,
LDO2 and LDO5 are rated at 200 mA each and LDO3 is
rated at 100 mA. All LDO’s are optimized for low noise and
high isolation.
The open drain output current sink can be programmed up to
150 mA by using an external low cost resistor.
A single supply, low voltage operational amplifier has rail to
rail input and output with 600 kHz of gain-bandwidth product.
Typical Application Circuit
V
DD1
, V
DD2
and V
DD3
must be tied together externally. Collectively called V
DS200379
Key Specifications
n 3.0V to 5.5V Input Voltage Range
n Two 200 mA, Two 150 mA and One 100 mA LDO’s
n 100 mV typ Dropout Voltage
n 150 mA General-Purpose Open-drain programmable
n Low Voltage Rail to Rail Input/Output Operational
n 28 pin LLP package
Applications
n Cellular/PCS handsets
n PDA’s, Palmtops, and portable terminals
n Single–Cell Li+ Systems
n 2- or 3- Cell NiMH, NiCd or Alkaline System
current sink for back light LED
Amplifier
DD
.
@
20037901
I
MAX
December 2005
www.national.com

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LP3927ILQX-AJ Summary of contents

Page 1

... V and V must be tied together externally. Collectively called V DD1 DD2 DD3 © 2005 National Semiconductor Corporation Key Specifications n 3.0V to 5.5V Input Voltage Range n Two 200 mA, Two 150 mA and One 100 mA LDO’s n 100 mV typ Dropout Voltage n 150 mA General-Purpose Open-drain programmable current sink for back light LED ...

Page 2

... LP3927 Pin Out Diagram (Top View) Output Current Rating and Voltage Options * denotes the voltage options that are available currently. For other options, please contact the National Semiconductor factory sales office/distributors for availability and specifications. Voltage options in the two tables cannot be mixed and matched. www.national.com ...

Page 3

... Ordering Information LP3927 Supplied as LP3927 Supplied as 1000 Units, tape and 4500 Units, tape and reel reel LP3927ILQ-AH LP3927ILQX-AH LP3927ILQ-AJ LP3927ILQX-AJ LP3927ILQ-AP LP3927ILQX-AP LP3927ILQ-AZ LP3927ILQX-AZ For LDO delay options, please refer to Electrical Characteristics Table. Standard Optional VO1 VO2 LDO delay LDO delay ...

Page 4

Pin Descriptions Pin Name 1 VO1 150 mA, LDO1 output pin. 2 EN5 LDO5 enable input. 3 EN4 LDO4 enable input. 4 EN3 LDO3 enable input. 5 RST Externally pulled high, open drain output to processor/memory reset. 6 IRQ Externally ...

Page 5

Functional Block Diagram 20037903 5 www.national.com ...

Page 6

... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. All pins except LED_PGM, BYP, op amp’s inputs & output OP_AMP_OUT, IN-, IN+ GND to GND SLUG Junction Temperature Storage Information Soldering Temperature ...

Page 7

Electrical Characteristics, Digital Interface Symbol Parameter V Logic Low Output OL V Logic High Input IH V Logic Low Input IL I Input Leakage Current LEAKAGE Electrical Characteristics, Error Flag Symbol Parameter V Error Flag High Th-H V Error Flag ...

Page 8

Electrical Characteristics, Operational Amplifier Unless otherwise noted, V OP_AMP_VDD appearing in normal type apply for T range for operation, −40˚C to +85˚C. (Note 7) Symbol Parameter C Common-Mode Input Capacitor IN V Output Swing OUT I Supply Current S SR ...

Page 9

Typical Performance Characteristics 0.01 µ 0.2V 25˚C, Enable pin is tied OUT A PSRR vs Frequency LDO4 Enable Response (Cout=2.2µF) LDO2 (1.8V Option) Load Transient Unless otherwise specified ...

Page 10

Typical Performance Characteristics 0.01 µ 0.2V 25˚C, Enable pin is tied OUT A LDO4 (2.8V Option) Load Transient LDO2 (1.8V Option) Line Transient LDO4 (2.8V Option) Line Transient www.national.com Unless otherwise ...

Page 11

Timing Diagrams Note: Diagram indicates Open Drain IRQ tied to V *** = Internal signal 1. Keyboard de-bounce delay, 32 msec typ. 2. Delay between LDO1 reaching 95% of its output voltage and LDO2 enable, 125 µsec typical. 3. Both ...

Page 12

Timing Diagrams (Continued) Note: Diagram indicates Open Drain IRQ tied to V *** = Internal signal 1. Keyboard de-bounce delay, 32msec typ. 2. Delay between LDO1 reaching 95% of its output voltage and LDO2 enable. 3. Both LDO1 and LDO2 ...

Page 13

Timing Diagrams (Continued) Note: Diagram indicates Open Drain IRQ tied to V *** = Internal signal 1. VEXT goes active low. 2. VEXT 32 msec de-bounce period. 3. Delay between LDO1 and LDO2 enables. 4. Both LDO1 and LDO2 outputs ...

Page 14

Timing Diagrams (Continued) Note: Diagram indicates Open Drain IRQ tied to V *** = Internal signal 1. VEXT goes active low. 2. VEXT 32 msec de-bounce period. 3. Delay between LDO1 and LDO2 enable. 4. Both LDO1 and LDO2 outputs ...

Page 15

Application Hints LP3927 FUNCTION DESCRIPTION The LP3927 is designed for cellular/PCS handsets. The LDOs power the microprocessor, RF and digital sections of the phone. When a KYBD debounce of longer than detected by the LP3927, the IRQ ...

Page 16

Application Hints (Continued) surement, junction to ambient thermal resistance (θ be improved by as much as two times if a LLP is soldered on the board with thermal land and thermal vias than if not. Consider the following equation: Where ...

Page 17

... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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