MC68HC11E0CFN3 Freescale Semiconductor, MC68HC11E0CFN3 Datasheet - Page 43

• Manufacturer Part Number: MC68HC11E0CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC11E0CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 3MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

2.3.3.1 System Configuration Register
The system configuration register (CONFIG) consists of an EEPROM byte and static latches that control
the startup configuration of the MCU. The contents of the EEPROM byte are transferred into static
working latches during reset sequences. The operation of the MCU is controlled directly by these latches
and not by CONFIG itself. In normal modes, changes to CONFIG do not affect operation of the MCU until
after the next reset sequence. When programming, the CONFIG register itself is accessed. When the
CONFIG register is read, the static latches are accessed. See
Programming and Erasure
To take full advantage of the MCU’s functionality, customers can program the CONFIG register in
bootstrap mode. This can be accomplished by setting the mode pins to logic 0 and downloading a small
program to internal RAM. For more information, Freescale application note AN1060 entitled
Bootstrap Mode
All of this functionality is provided by PCbug11 which can be found on the Freescale Web site at
http://www.freescale.com. For more information on using PCbug11 to program an E-series device,
Freescale engineering bulletin EB296 entitled
the M68HC11EVBU
Operation of the CONFIG register in the MC68HC811E2 differs from other devices in the M68HC11 E
series. See
Freescale Semiconductor
•
•
•
Bulk erase
Byte programming
Communication server
Resets:
U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the latch prior to reset,
but the function of COP is controlled by the DISR bit in TEST1 register.
Figure 2-10
Single chip:
Expanded:
Bootstrap:
Address: $103F
The CONFIG register on the 68HC11 is an EEPROM cell and must be
programmed accordingly.
has been included at the back of this document. The downloadable talker will consist of:
Read:
Write:
Test:
has been included at the back of this document.
Figure 2-10. System Configuration Register (CONFIG)
and
Bit 7
0
0
0
0
for information on modifying CONFIG.
Figure
= Unimplemented
6
0
0
0
0
M68HC11E Family Data Sheet, Rev. 5.1
2-11.
5
0
0
0
0
Programming MC68HC711E9 Devices with PCbug11 and
NOTE
4
0
0
0
0
NOSEC
U
U
3
1
1
2.5.1 EEPROM and CONFIG
NOCOP
U(L)
U(L)
U
U
2
ROMON
U
U
U
1
1
EEON
Bit 0
U
U
U
U
M68HC11
Memory Map
43