MC68HC11E0CFN3 Freescale Semiconductor, MC68HC11E0CFN3 Datasheet - Page 67

MC68HC11E0CFN3

Manufacturer Part Number
MC68HC11E0CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC11E0CFN3

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
3MHz
Interface Type
SCI/SPI
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
512Byte
# I/os (max)
38
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
52
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

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At the end of the interrupt service routine, an return-from interrupt (RTI) instruction is executed. The RTI
instruction causes the saved registers to be pulled off the stack in reverse order. Program execution
resumes at the return address.
Certain instructions push and pull the A and B accumulators and the X and Y index registers and are often
used to preserve program context. For example, pushing accumulator A onto the stack when entering a
subroutine that uses accumulator A and then pulling accumulator A off the stack just before leaving the
subroutine ensures that the contents of a register will be the same after returning from the subroutine as
it was before starting the subroutine.
Freescale Semiconductor
JSR, JUMP TO SUBROUTINE
BSR, BRANCH TO SUBROUTINE
RTS, RETURN FROM
SUBROUTINE
INDEXED, X
INDEXED, Y
INDEXED, Y
DIRECT
PC
PC
MAIN PROGRAM
MAIN PROGRAM
$8D = BSR
RTN
RTN
RTN
RTN
$39 = RTS
PC
PC
PC
PC
NEXT MAIN INSTR.
NEXT MAIN INSTR.
NEXT MAIN INSTR.
NEXT MAIN INSTR.
MAIN PROGRAM
MAIN PROGRAM
MAIN PROGRAM
MAIN PROGRAM
$AD = JSR
$AD = JSR
$BD = PRE
$9D = JSR
$18 = PRE
hh
dd
ff
ff
ll
È
È
SP–2
SP–1
SP+1
SP+2
SP
SP
7
7
È
Figure 4-2. Stacking Operations
M68HC11E Family Data Sheet, Rev. 5.1
SP–2
SP–1
STACK
STACK
SP
RTN
RTN
RTN
RTN
7
H
L
H
L
STACK
RTN
RTN
0
0
H
L
0
LEGEND:
RTN
RTN
RTN = ADDRESS OF NEXT INSTRUCTION IN MAIN PROGRAM TO
RTI, RETURN FROM INTERRUPT
SWI, SOFTWARE INTERRUPT
WAI, WAIT FOR INTERRUPT
dd = 8-BIT DIRECT ADDRESS ($0000–$00FF) (HIGH BYTE ASSUMED
hh = HIGH-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
È = STACK POINTER POSITION AFTER OPERATION IS COMPLETE
H
ff = 8-BIT POSITIVE OFFSET $00 (0) TO $FF (255) IS ADDED TO INDEX
L
ll = LOW-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
rr= SIGNED RELATIVE OFFSET $80 (–128) TO $7F (+127) (OFFSET
= MOST SIGNIFICANT BYTE OF RETURN ADDRESS
= LEAST SIGNIFICANT BYTE OF RETURN ADDRESS
PC
PC
PC
BE EXECUTED UPON RETURN FROM SUBROUTINE
TO BE $00)
RELATIVE TO THE ADDRESS FOLLOWING THE MACHINE CODE
OFFSET BYTE)
INTERRUPT ROUTINE
MAIN PROGRAM
MAIN PROGRAM
$3F = SWI
$3E = WAI
$3B = RTI
È
È
SP+1
SP+2
SP+3
SP+4
SP+5
SP+6
SP+7
SP+8
SP+9
SP–9
SP–8
SP–7
SP–6
SP–5
SP–4
SP–3
SP–2
SP–1
SP
SP
7
7
STACK
STACK
ACCB
ACCA
ACCB
ACCA
RTN
RTN
RTN
RTN
CCR
CCR
IX
IY
IX
IY
IX
IY
IX
IY
H
L
H
L
H
L
H
L
CPU Registers
H
H
L
L
0
0
67

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