AM29LV200T-100EC Spansion Inc., AM29LV200T-100EC Datasheet

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AM29LV200T-100EC

Manufacturer Part Number
AM29LV200T-100EC
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV200T-100EC

Lead Free Status / Rohs Status
Not Compliant
Am29LV200
2 Megabit (256 K x 8-Bit/128 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
— Regulated voltage range: 3.0 to 3.6 volt read and
High performance
— Full voltage range: access times as fast as 100
— Regulated voltage range: access times as fast as
Ultra low power consumption (typical values at 5
MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 10 mA read current
— 20 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
operations for battery-powered applications
write operations and for compatibility with high
performance 3.3 volt microprocessors
ns
90 ns
three 64 Kbyte sectors (byte mode)
three 32 Kword sectors (word mode)
A hardware method of locking a sector to prevent
any program or erase operations within that
sector
Sectors can be locked via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
PRELIMINARY
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
Typical 1,000,000 write cycles per sector
(100,000 cycles minimum guaranteed)
Package option
— 48-pin TSOP
— 44-pin SO
Compatibility with JEDEC standards
— Pinout and software compatible with single-
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a software method of detecting program
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
power supply Flash
or erase operation completion
program or erase cycle completion
or program data to, a sector that is not being
erased, then resumes the erase operation
array data
Publication# 20513
Issue Date: March 1998
Rev: D Amendment/+1

Related parts for AM29LV200T-100EC

AM29LV200T-100EC Summary of contents

Page 1

... PRELIMINARY Am29LV200 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3 ...

Page 2

... The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory. The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode ...

Page 3

PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: V Speed Options Full Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: ...

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CONNECTION DIAGRAMS A15 1 A14 2 3 A13 A12 4 A11 5 A10 WE# 11 RESET RY/BY ...

Page 5

CONNECTION DIAGRAMS NC RY/BY CE OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 PIN CONFIGURATION A0–A16 = 17 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data ...

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... Valid Combinations Am29LV200T-90R, EC, EI, FC, FI, SC, SI Am29LV200B-90R Am29LV200T-100, Am29LV200B-100 EC, EI, EE, Am29LV200T-120, FC, FI, FE, Am29LV200B-120 SC, SI, SE Am29LV200T-150, Am29LV200B-150 OPTIONAL PROCESSING Blank = Standard Processing B = Burn-in (Contact an AMD representative for more information) TEMPERATURE RANGE C = Commercial (0°C to +70° Industrial (–40°C to +85° Extended (–55°C to +125°C) ...

Page 7

DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is composed of latches ...

Page 8

... CMOS standby current ( but not within greater. The RESET# pin may be tied to the system reset cir- cuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up 0 firmware from the Flash memory. , but not within ...

Page 9

... Table 2. Am29LV200T Top Boot Block Sector Address Table Sector A16 A15 A14 SA0 SA1 SA2 SA3 SA4 SA5 SA6 Table 3. Am29LV200B Bottom Boot Block Sector Address Table Sector A16 A15 A14 SA0 SA1 SA2 SA3 SA4 SA5 SA6 Note for Tables 2 and 3: Address range is A16:A-1 in byte mode and A16:A0 in word mode. See “Word/Byte Configuration” ...

Page 10

... The device is shipped with all sectors unprotected. AMD offers the option of programming and protecting sectors at its factory prior to shipping the device through AMD’s ExpressFlash™ Service. Contact an AMD representative for details possible to determine whether a sector is protected or unprotected. See “Autoselect Mode” for details. ...

Page 11

Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to Table 5 for com- mand definitions). In addition, the following hardware data protection measures prevent accidental erasure or ...

Page 12

Autoselect Command Sequence The autoselect command sequence allows the host system to access the manufacturer and devices codes, and determine whether or not a sector is protected. Table 5 shows the address and data requirements. This method is an alternative ...

Page 13

Any commands written to the chip during the Embed- ded Erase algorithm are ignored. Note that a hardware reset during the chip erase operation immediately ter- minates the operation. The Chip Erase command se- quence should be reinitiated once the ...

Page 14

See “Write Operation Status” for more information. The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device allows reading autoselect codes ...

Page 15

Table 5. Am29LV200 Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector ...

Page 16

WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections de- scribe the functions of these bits. DQ7, RY/BY#, and ...

Page 17

RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

Page 18

The remaining scenario is that the system initially de- termines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles, de- termining the ...

Page 19

Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...

Page 20

ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +150 C Ambient Temperature with Power Applied . . . . . . . . ...

Page 21

DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Note 1) V Active Write Current CC I CC2 (Notes 2 ...

Page 22

... DC CHARACTERISTICS (continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 8. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note 1500 2000 2500 Time Frequency in MHz Figure 9. Typical I vs. Frequency CC1 Am29LV200 3000 3500 4000 20513D-11 ...

Page 23

TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalent Figure 10. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 11. Input Waveforms ...

Page 24

AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

Page 25

AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...

Page 26

AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std. Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

Page 27

AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...

Page 28

AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# t GHWL OE# WE Data RY/BY VCS Notes program address program data Illustration shows device ...

Page 29

AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# t GHWL OE WE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase), VA ...

Page 30

AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...

Page 31

AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use OE# and CE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...

Page 32

AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...

Page 33

AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...

Page 34

ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions 3.0 ...

Page 35

PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") BSC * For reference only. BSC is an ANSI standard for Basic Space Centering. TSR048—48-Pin Reverse TSOP (measured in millimeters) Pin 1 ...

Page 36

PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters 1.27 NOM. TOP VIEW 28.00 28.40 2.17 2.45 0.35 0.50 SIDE VIEW 13.10 15.70 13.50 16.30 ...

Page 37

... Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. ...

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