TC58DVM82A1FT00 Toshiba, TC58DVM82A1FT00 Datasheet - Page 15

• Manufacturer Part Number: TC58DVM82A1FT00
• Manufacturer: Toshiba

Specifications of TC58DVM82A1FT00

• Cell Type: NAND
• Density: 256Mb
• Access Time (max): 35ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 25b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP-I
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 32M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

PIN FUNCTIONS
are configured as shown in Figure 1.
The device is a serial access memory which utilizes time-sharing input of address information. The device pin-outs
operation mode command into the internal command
register. The command is latched into the command
register from the I/O port on the rising edge of the WE
signal while CLE is High.
address information or input data into the internal
address/data register.
such as during a Program or Erase operation, and will not enter Standby mode even if the CE input goes High.
The CE signal must stay Low during the Read mode Busy state to ensure that memory array data is correctly
transferred to the data register.
device.
regulator is reset when WP is Low. This signal is usually used for protecting the data during the power-on/off
sequence when input signals are invalid.
Busy state (
(
CE goes High during a Read operation. The CE signal is ignored when device is in Busy state (
WE if ALE is High.
Command Latch Enable: CLE
Address Latch Enable: ALE
Chip Enable: CE
Write Enable: WE
Read Enable: RE
I/O Port: I/O1 to 8
Write Protect: WP
Ready/Busy: RY
RY
The CLE input signal is used to control loading of the
The ALE signal is used to control loading of either
Address information is latched on the rising edge of
Input data is latched if ALE is Low.
The device goes into a low-power Standby mode when
The WE signal is used to control the acquisition of data from the I/O port.
The RE signal controls serial data output. Data is available t
The internal column address counter is also incremented (Address = Address + l) on this falling edge.
The I/O1 to 8 pins are used as a port for transferring address, command and input/output data to and from the
The WP signal is used to protect the device from accidental programming or erasing. The internal voltage
The
/
BY
RY
= H) after completion of the operation. The output buffer for this signal is an open drain.
/
BY
RY
output signal is used to indicate the operating condition of the device. The
/
BY
/
BY
= L) during the Program, Erase and Read operations and will return to Ready state
RY
GND
V
CLE
ALE
V
/
WP
NC
NC
NC
NC
NC
RE
CE
NC
NC
NC
NC
WE
NC
NC
NC
NC
NC
BY
CC
SS
REA
after the falling edge of RE .
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Figure 1 pinout
TC58DVM82A1FT00
2003-03-25 15/34
RY
/
BY
RY
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
signal is in
/
BY
NC
NC
NC
NC
I/O8
I/O7
I/O6
I/O5
NC
NC
NC
V
Vss
NC
NC
NC
I/O4
I/O3
I/O2
I/O1
NC
NC
NC
NC
CC
= L),