TE28F640J3D75 Intel, TE28F640J3D75 Datasheet - Page 24

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TE28F640J3D75

Manufacturer Part Number
TE28F640J3D75
Description
Manufacturer
Intel
Datasheet

Specifications of TE28F640J3D75

Cell Type
NOR
Density
64Mb
Access Time (max)
75ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
23/22Bit
Operating Supply Voltage (typ)
3/3.3V
Sync/async
Asynchronous
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
8M/4Mword
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant

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Table 10: Read Operations (Sheet 2 of 2)
Notes:
1.
2.
3.
4.
5.
6.
Datasheet
24
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
#
CE
of CE0, CE1, CE2 or CE# that disables the device.
See AC Input/Output Reference Waveforms for the maximum allowable input slew rate.
OE# may be delayed up to t
on t
See
Equivalent Testing Load Circuit” on page 30
Sampled, not 100% tested.
For devices configured to standard word/byte read mode, R15 (t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVQV
ELQV
GLQV
PHQV
ELQX
GLQX
EHQZ
GHQZ
OH
ELFL/
FLQV/
FLQZ
EHEL
APA
GLQV
X
ELQV
Sym
Figure 17, “AC Input/Output Reference Waveform” on page 30
low is defined as the first edge of CE0, CE1, CE2 or CE# that enables the device. CE
t
t
ELFH
FHQV
.
Asynchronous Specifications V
Address to Output Delay
CE
OE# to Non-Array Output Delay
RP# High to Output Delay
CE
OE# to Output in Low Z
CE
OE# High to Output in High Z
Output Hold from Address, CE
Change, Whichever Occurs First
CE
BYTE# to Output Delay
BYTE# to Output in High Z
CEx High to CEx Low
Page Address Access Time
OE# to Array Output Delay
X
X
X
X
to Output Delay
to Output in Low Z
High to Output in High Z
Low to BYTE# High or Low
ELQV
Parameter
-t
GLQV
after the first edge of CE0, CE1, CE2 or CE# that enables the device without impact
X
, or OE#
CC
= 2.7 V–3.6 V
for testing characteristics.
128 Mbit
256 Mbit
128 Mbit
256 Mbit
128 Mbit
256 Mbit
Density
32 Mbit
64 Mbit
32 Mbit
64 Mbit
32 Mbit
64 Mbit
All
All
All
APA
(3)
) will equal R2 (t
Numonyx™ Embedded Flash Memory (J3 v. D)
and V
Min
0
0
0
0
CCQ
= 2.7 V–3.6 V
AVQV
and
Max
150
180
210
210
75
75
75
95
75
75
75
95
25
25
15
10
25
25
1
1
X
).
Figure 18, “Transient
high is defined at the first edge
(3)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
November 2007
Notes
1,2,4
1,2,5
1,2,5
1,2,5
1,2,5
1,2,5
1,2,5
1,2,5
1,2,5
1,2,4
5, 6
308551-05
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2

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