TE28F640J3D75

Manufacturer Part NumberTE28F640J3D75
ManufacturerIntel
TE28F640J3D75 datasheet
 


Specifications of TE28F640J3D75

Cell TypeNORDensity64Mb
Access Time (max)75nsInterface TypeParallel
Boot TypeNot RequiredAddress Bus23/22Bit
Operating Supply Voltage (typ)3/3.3VSync/asyncAsynchronous
Package TypeTSOPProgram/erase Volt (typ)2.7 to 3.6V
Operating Temp Range-40C to 85COperating Temperature ClassificationIndustrial
Operating Supply Voltage (min)2.7VOperating Supply Voltage (max)3.6V
Word Size8/16BitNumber Of Words8M/4Mword
MountingSurface MountPin Count56
Lead Free Status / Rohs StatusNot Compliant  
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Table 41: Protection Register Information
(1)
Offset
Length
P = 31h
Number of Protection register fields in JEDEC ID space.
(P+E)h
1
“00h,” indicates that 256 protection bytes are available
Protection Field 1: Protection Description
This field describes user-available One Time Programmable (OTP)
protection register bytes. Some are pre-programmed with device-
unique serial numbers. Others are user-programmable. Bits 0-15 point
(P+F)h
to the protection register lock byte, the section’s first byte. The
(P+10)h
4
following bytes are factory pre-programmed and user-programmable.
(P+11)h
(P+12)h
bits 0-7 = Lock/bytes JEDEC-plane physical low address
bits 8-15 = Lock/bytes JEDEC-plane physical high address
bits 16-23 = “n” such that 2
bits 24-31 = “n” such that 2
Note:
1.
The variable P is a pointer which is defined at CFI offset 15h.
Table 42: Burst Read Information
(1)
Offset
Length
P = 31h
Page Mode Read capability
bits 0–7 = “n” such that 2
(P+13)h
1
page bytes. See offset 28h for device word width to determine page-
mode data output width. 00h indicates no read page buffer.
Number of synchronous mode read configuration fields that follow. 00h
(P+14)h
1
indicates no burst capability.
(P+15)h
Reserved for future use
Note:
1.
The variable P is a pointer which is defined at CFI offset 15h.
The following table is the extended CFI used for the lower die of 256 Mb (2x128)
device.
Table 43: Additional CFI link for the lower die of the stacked device (256 Mb only)
(1)
Offset
Length
P = 31h
(Optional Flash Features and Commands)
Link Field Bit Information
(P+15)h
Bits[9:0] = Address offset (within 32 Mbit segment) of reference
(P+16)h
4
CFI table
(P+17)h
(P+18)h
Bits [27:10] = n
Bits [30:28] = Memory type:
• 000b = CSD Flash
• 100b = LD Flash
bit 31 = Another CFI link field immediately follows
Datasheet
64
Numonyx™ Embedded Flash Memory (J3 v. D)
Description
(Optional Flash Features and Commands)
n
= factory pre-programmed bytes
n
= user-programmable bytes
Description
(Optional Flash Features and Commands)
n
HEX value represents the number of read-
Description
th
32 Mbit segment of referenced CFI table
Hex
Add.
Value
Code
3F:
--01
01
40:
--80
80h
41:
--00
00h
42:
--03
8bytes
43:
--03
8bytes
Hex
Add.
Value
Code
44:
--03
8 byte
45:
--00
0
46:
Add.
Hex Code
Value
46:
--10
47:
--10
48:
--00
49:
--00
bit [9:0] = 10h
10
bits[27:10] = 04h
4
bits[30:28] = 0h
0
Bit 31 = 0h
No
November 2007
308551-05