71V2558S133PF IDT, Integrated Device Technology Inc, 71V2558S133PF Datasheet - Page 23

• Manufacturer Part Number: 71V2558S133PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 71V2558S133PF

• Density: 4.5Mb
• Access Time (max): 4.2ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 300mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 18b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

Available JTAG Instructions
JTAG Identification Register Definitions (SA Version only)
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and TRST.
Revision Number (31:28)
IDT Device ID (27:12)
IDT JEDEC ID (11:1)
ID Register Indicator Bit (Bit 0)
EXTEST
SAMPLE/PRELOAD
DEVICE_ID
HIGHZ
RESERVED
RESERVED
RESERVED
RESERVED
CLAMP
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
BYPASS
VALIDATE
IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
Instruction Field
Instruction
Forces contents of the bound ary scan cells onto the device outputs
Places the boundary scan registe r (BSR) between TDI and TDO.
Places the boundary scan registe r (BSR) between TDI and TDO.
SAMPLE allows data from device inputs
in the boundary scan cells and shifted serially through TDO. PRELOAD
allows data to be input serially into the bo undary scan cells via the TDI.
Loads the JTAG ID register (JIDR) with the vendor ID code and places
Places the bypass register (BYR) be tween TDI and TDO. Forces all
device o utput drivers to a High-Z state.
Several combinations are reserved. Do not use codes other than those
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,
Uses BYR. Forces contents of the bound ary scan cells onto the device
outputs. Places the byp ass registe r (BYR) between TDI and TDO.
Same as above.
controller passes through the CAPTURE-IR state. The lower two bits '01'
are mand ated by the IEEE std. 1149.1 specification.
Same as above.
as a single bit in length.
the register between TDI and TDO.
VALIDATE and BYPASS instructions.
Automatically loaded into the instruction register whenever the TAP
The BYPASS instruction is used to truncate the boundary scan register
0x210, 0x212
Value
0x33
0x2
1
6.42
23
Reserved for version number.
Defines IDT part number 71V2556SA and 71V2558SA, respectively.
Indicates the presence of an ID register.
Allows unique identification of device vendor as IDT.
Description
(2)
and outputs
Commercial and Industrial Temperature Ranges
(1)
to be captured
Description
(1)
.
OPCODE
0000
0010
0100
0110
1000
1010
0001
0011
0101
1001
1100
1110
0111
1011
1101
1111
I4875 tbl 02
I4875 tbl 04