71V2558S133PF IDT, Integrated Device Technology Inc, 71V2558S133PF Datasheet - Page 5

• Manufacturer Part Number: 71V2558S133PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 71V2558S133PF

• Density: 4.5Mb
• Access Time (max): 4.2ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 300mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 18b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

Recommended Operating
Temperature and Supply Voltage
NOTES:
1. T
Pin Configuration — 128K x 36
IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
Commercial
Industrial
A
Grade
is the "instant on" case temperature.
-40°C to +85°C
Temperature
0°C to +70°C
V
V
NOTES:
1. Pins 14, 16 and 66 do not have to be connected directly to V
2. Pins 83 and 84 are reserved for future 8M and 16M respectively.
3. Pin 64 does not have to be connected directly to V
V
V
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DD
DD
DDQ
DDQ
V
DDQ
DDQ
V
V
V
V
V
DD
SS
SS
SS
SS
SS
P3
P4
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
pin supports ZZ (sleep mode).
(1)
(1)
(1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
V
100 99 98 97 96 95 94 93 92 91 90
0V
0V
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
SS
3.3V±5%
3.3V±5%
V
DD
2.5V±5%
2.5V±5%
V
Top View
4875 tbl 05
DDQ
TQFP
6.42
5
SS
89 88
as long as the input voltage is ≤ V
87 86 85 84 83 82 81
DD
as long as the input voltage is ≥ V
Commercial and Industrial Temperature Ranges
80
79
78
77
76
75
74
73
71
69
67
66
65
64
62
61
60
59
58
57
56
54
53
52
72
70
68
63
55
51
4875 drw 02
IL
; on the latest die revision this
I/O
I/O
V
I/O
I/O
I/O
I/O
I/O
I/O
V
V
V
V
I/O
I/O
I/O
I/O
V
V
V
V
I/O
I/O
V
V
I/O
I/O
V
I/O
I/O
DDQ
SS
SS
DDQ
SS
DD
DD
DDQ
SS
SS
DDQ
SS/ZZ
15
14
13
12
11
10
9
8
5
4
3
2
7
6
1
0
P1
P2
(1)
IH
(3)
.
,