71V2556S133PF IDT, Integrated Device Technology Inc, 71V2556S133PF Datasheet - Page 4

71V2556S133PF

Manufacturer Part Number
71V2556S133PF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 71V2556S133PF

Density
4.5Mb
Access Time (max)
4.2ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
133MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
TQFP
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
300mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Word Size
36b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Functional Block Diagram
NOTES:
1. V
2. V
Recommended DC Operating
Conditions
IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
Symbol
V
V
V
V
V
V
DDQ
IL
IH
DD
SS
IH
IH
IL
(min.) = –1.0V for pulse width less than t
(max.) = +6.0V for pulse width less than t
Core Supply Voltage
I/O Supply Voltage
Supply Voltage
Input High Voltage - Inputs
Input High Voltage - I/O
Input Low Voltage
Address A [0:17]
Parameter
CE1, CE2, CE2
ADV/LD
Clock
(optional)
TRST
BWx
CEN
TMS
LBO
R/W
TCK
TDI
OE
3.135
2.375
-0.3
Min.
1.7
1.7
0
(1)
CYC
CYC
/2, once per cycle.
Typ.
3.3
2.5
/2, once per cycle.
____
____
____
0
(SA Version)
D
D
D
V
Clk
JTAG
V
DDQ
3.465
2.625
DD
Max.
0.7
0
+0.3
Q
Q
Q
+0.3
(2)
4875 tbl 03
Unit
V
V
V
V
V
V
6.42
TDO
4
Control Logic
Gate
Commercial and Industrial Temperature Ranges
Address
Control
MEMORY ARRAY
Data I/O [0:15],
Output Register
256x18 BIT
DI
I/O P[1:2]
Mux
D
Q
DO
Sel
4875 drw 01b

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