HDMP-1032 Avago Technologies US Inc., HDMP-1032 Datasheet - Page 17

• Manufacturer Part Number: HDMP-1032
• Manufacturer: Avago Technologies US Inc.

Specifications of HDMP-1032

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Operating Temp Range: 0C to 150C
• Operating Temperature Classification: Commercial
• Package Type: PQFP
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

17
HDMP-1032 (Tx) Pin Definition (continued)
PLL/Clock Generator
Name
TXCAP0
TXCAP1
TXCLK
TXDIV0
TXDIV1
LOCKED
Power Supply/Ground
V
V
V
V
V
GND
GND_TTL
GND_HS
GND_A1
GND_A2
Test Mode/No Connect Pins
TCLKENB
NC
CC
CC
CC
CC
CC
_TTL
_HS
_A1
_A2
Pin
32
33
37
26
27
12
13
24
36
49
64
8
41
17
31
57
1
14
25
35
48
9
40
18
30
56
28
7
15
16
21
22
23
29
34
38
39
42
43
44
45
Type
C
I-TTL
I-TTL
O-TTL
S
S
S
S
S
S
S
S
I-TTL
Signal
Loop Filter Capacitor: A 0.1 F min. loop filter capacitor, C2, must
be connected across TXCAP0 and TXCAP1 for all combinations of
TXDIV1/TXDIV0. See Figure 12.
Transmit Word Clock Input: When TCLKENB is low, this word rate
clock input is phase locked and multiplied to generate the high-
speed serial clock. When TCLKENB is high, the PLL is bypassed
and TXCLK becomes the serial clock.
VCO Divider Select: These pins program the VCO divider chain to
operate at full, half or quarter speed. See Typical Operating Rates
table and Figure 2.
Locked to TXCLK: This pin goes high when the transmit PLL
achieves frequency lock to the TXCLK signal.
Logic Power Supply: Normally 3.3 volts. This power supply is
used for the internal transmitter logic.
TTL Power Supply: Normally 3.3 volts. Used for all TTL transmitter
input and output buffer cells.
Serial Output Power Supply: Normally 3.3 volts. Used for Serial
Output pins.
Analog Power Supply: Normally 3.3 volts. Used for the analog
section.
Ground: Normally 0 volts. Tie to ground.
TTL Ground: Normally 0 volts. Tie to ground.
Serial Output Ground: Normally 0 volts.
Analog Ground: Normally 0 volts.
Enable External Serial Rate Clock Input: When set high, this input
causes the TXCLK input to be used for the serial transmit clock
rather than the internal VCO clock. It is intended for diagnostic
purposes and normally tied low.
No Connect: These pins should be left unconnected.