HDMP-1032 Avago Technologies US Inc., HDMP-1032 Datasheet - Page 18

HDMP-1032

Manufacturer Part Number
HDMP-1032
Description
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of HDMP-1032

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.15V
Operating Supply Voltage (max)
3.45V
Operating Temp Range
0C to 150C
Operating Temperature Classification
Commercial
Package Type
PQFP
Mounting
Surface Mount
Pin Count
64
Lead Free Status / Rohs Status
Not Compliant

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HDMP-1034 (Rx) Pin Definition
User Mode Options/Status
Name
RXFLGENB
ESMPXENB
PASSENB
RXDATA
RXCNTL
High-Speed Serial/Parallel I/O
HSIN+
HSIN-
RX[0]
RX[1]
RX[2]
RX[3]
RX[4]
RX[5]
RX[6]
RX[7]
RX[8]
RX[9]
RX[10]
RX[11]
RX[12]
RX[13]
RX[14]
RX[15]
RXFLAG
Link Status
RXREADY
RXERROR
18
Pin
22
23
26
44
43
18
19
3
2
63
62
61
60
59
58
55
54
53
52
51
50
47
46
45
4
5
Type
I-TTL
I-TTL
I-TTL
O-TTL
O-TTL
HS_IN
O-TTL
O-TTL
O-TTL
O-TTL
Signal
Flag Bit Mode Select: When set high, the RXFLAG bit output is
available to the user as an extra 17th data bit.
Enhanced Simplex Mode Enable: Enables descrambling of the Flag
Bit encoding. The ESMPXENB pin on the Tx chip must be set to the
same value. This mode should be enabled unless compatibility with
previous versions of G-Link (i.e. HDMP-1022/1012) is desired which
don’t have this feature.
Enable Parallel Automatic Synchronization System: The parallel
Rx data and control words are read out with REFCLK instead
of the incoming word’s parallel clock. The relative phase of the
parallel output bits is internally adjusted so that they are clocked
out with the rising edge of the REFCLK.
Data Word Available Output: This output indicates that the Rx
chip word outputs RX[0-15] have a data word.
Control Word Available Output: This output indicates that the Rx
chip word outputs RX[0-13] have a control word.
Serial Data Input
Word Outputs
Flag Bit: If both TXFLGENB and RXFLGENB have been asserted,
this output indicates the value of the transmitted flag bit which
can be used as an extra 17th data bit.
Receiver Ready: This signal is asserted when the word alignment
block has seen error-free code field nibbles for 64 up to 128
consecutive words. When ESMPXENB = 1, the toggling of the
scrambled flag bit is also checked. RXREADY is de-asserted
upon 2 consecutive errors in the code field or if the toggling of
the flag bit is absent when ESMPXENB=1.
Received Data Error: Asserted when a word is received which
does not correspond to either a valid Data, Control, or Idle
Word encoding.

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