MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 101

• Manufacturer Part Number: MC68HC711K4CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711K4CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 24KB
• Total Internal Ram Size: 768Byte
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 84
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

M68HC11K Family
MOTOROLA
NOTE:
Address: $003F
CONFIG is writable once in normal modes and writable at any time in
special modes.
NOSEC — RAM and EPROM Security Disabled Bit
M68HC11K Family devices are normally manufactured with NOSEC set
and the security option unavailable. However, on special request, a
mask option is selected during fabrication that enables the security
mode. The secure mode can be invoked on these parts by clearing
NOSEC. Contact a Motorola representative for information on the
availability of this feature.
The bootstrap program performs this sequence when the security
feature is present, enabled, and bootstrap mode is selected:
If all of the operations are successful, the bootload process continues as
if the device was never secured.
Reset:
Read:
Write:
1. Output $FF, all 1s, on the SCI.
2. Clear the BPROT register by turning block protect off.
3. If the EEPROM is enabled, erase the EEPROM.
4. Verify that the EEPROM is erased. If EEPROM is not erased,
5. Write $FF, all 1s, to the entire block of RAM.
6. Erase the CONFIG register.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Enable security
1 = Disable security
Figure 4-13. System Configuration Register (CONFIG)
begin sequence again.
ROMAD
Operating Modes and On-Chip Memory
Bit 7
—
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6
1
1
CLKX
—
5
PAREN
—
4
Operating Modes and On-Chip Memory
NOSEC
EEPROM and the CONFIG Register
3
1
NOCOP
—
2
ROMON
—
1
Technical Data
EEON
Bit 0
—
101