MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 17

MC68HC711K4CFN3

Manufacturer Part Number
MC68HC711K4CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC711K4CFN3

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROM
Program Memory Size
24KB
Total Internal Ram Size
768Byte
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
84
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711K4CFN3
Manufacturer:
MOLEX
Quantity:
12 000
Part Number:
MC68HC711K4CFN3
Manufacturer:
FREESCALE
Quantity:
3 181
Part Number:
MC68HC711K4CFN3
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
M68HC11K Family
MOTOROLA
Technical Data — M68HC11K Family
Figure
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
3-1
3-2
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10 Block Protect Register (BPROT) . . . . . . . . . . . . . . . . . . . . . . . 96
4-11 System Configuration Options Register (OPTION) . . . . . . . . . 97
4-12 Block Protect Register (BPROT) . . . . . . . . . . . . . . . . . . . . . . 100
Freescale Semiconductor, Inc.
For More Information On This Product,
M68HC11K4 Family Block Diagram . . . . . . . . . . . . . . . . . . . . . 29
M68HC11KS Family Block Diagram. . . . . . . . . . . . . . . . . . . . . 30
Pin Assignments for M68HC11K 84-Pin PLCC/J-Cerquad . . . 32
Pin Assignments for M6811K 80-Pin QFP . . . . . . . . . . . . . . . . 33
Pin Assignments for M6811KS 68-Pin PLCC/J-Cerquad . . . . . 34
Pin Assignments for M6811KS 80-Pin LQFP . . . . . . . . . . . . . . 35
External Reset Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Common Crystal Connections . . . . . . . . . . . . . . . . . . . . . . . . . 38
System Configuration Options 2 (OPT2) . . . . . . . . . . . . . . . . . 40
LIR Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
MODB/V
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Stacking Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Register and Control Bit Assignments . . . . . . . . . . . . . . . . . . .65
Highest Priority I-Bit Interrupt
M68HC11K4 Family Memory Map . . . . . . . . . . . . . . . . . . . . . . 82
M68HC11KS2 Family Memory Map . . . . . . . . . . . . . . . . . . . . . 83
RAM and I/O Mapping Register (INIT) . . . . . . . . . . . . . . . . . . .84
System Configuration Register (CONFIG) . . . . . . . . . . . . . . . . 88
EEPROM Mapping Register (INIT2). . . . . . . . . . . . . . . . . . . . . 89
EPROM Programming Control Register (EPROG). . . . . . . . . .91
EEPROM Programming Control Register (PPROG) . . . . . . . . 94
and Miscellaneous Register (HPRIO) . . . . . . . . . . . . . . . . . 80
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STBY
List of Figures
Connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Title
List of Figures
Technical Data
Page
17

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