MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 178

MC68HC711K4CFN3

Manufacturer Part Number
MC68HC711K4CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC711K4CFN3

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROM
Program Memory Size
24KB
Total Internal Ram Size
768Byte
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
84
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

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Serial Peripheral Interface (SPI)
8.6.4 Port D Data Direction Register
Technical Data
178
Address: $0009
DDD5 Bit
DDD[4:2] Bits
Reset:
Read:
Write:
Bit 5 of the port D data register (PD5) is dedicated as the slave select
(SS) input. In SPI slave mode, DDD5 has no meaning or effect. In SPI
master mode, DDD5 affects PD5 as follows:
When the SPI is enabled, SPI input pins remain functioning
regardless of the state of the corresponding DDD[4:2] bits. For SPI
output pins, however, the corresponding DDD[4:2] bits must be set or
the pins will function as general-purpose inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = PD5 is an error-detect input to the SPI.
1 = PD5 is configured as a general-purpose output line.
Figure 8-6. Port D Data Direction Register (DDRD)
Bit 7
0
0
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
6
0
0
DDD5
5
0
DDD4
4
0
DDD3
3
0
DDD2
2
0
M68HC11K Family
DDD1
1
0
MOTOROLA
DDD0
Bit 0
0

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