MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 72

• Manufacturer Part Number: MC68HC711K4CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711K4CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 24KB
• Total Internal Ram Size: 768Byte
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 84
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Operating Modes and On-Chip Memory
Technical Data
72
1. Not available on M68HC11KS devices
$005C
$005D
$005A
$005B
$005E
$005F
$0058
$0059
$0060
$0061
Addr.
Pulse Width Modulation
Pulse Width Modulation
Timer Polarity Register
General-Purpose Chip
General-Purpose Chip
General-Purpose Chip
General-Purpose Chip
Register (GPCS1C)
Register (GPCS2C)
Register (GPCS1A)
Register (GPCS2A)
Register (MM1CR)
Register (MM2CR)
See pages 240, 241
See pages 244, 247
See pages 245, 247
Register (CSCTL)
Chip Select Control
Timer Clock Select
Register (PWCLK)
Window 1 Control
Window 2 Control
Chip Select Clock
Memory Mapping
Memory Mapping
Select 1 Address
Select 2 Address
Stretch Register
Select 1 Control
Select 2 Control
Register Name
See page 237.
See page 237.
See page 249.
See page 243.
See page 245.
See page 213.
See page 215.
Figure 4-1. Register and Control Bit Assignments (Sheet 8 of 11)
(CSCSTR)
(PWPOL)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
G1DG2
CON34
G1A18
G2A18
PCLK4
Operating Modes and On-Chip Memory
IOSA
IOEN
Bit 7
0
0
0
0
0
0
0
0
0
0
0
0
0
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= Unimplemented
G1DPC
G2DPC
CON12
G1A17
G2A17
PCLK3
X1A18
X2A18
IOSB
IOPL
6
0
0
0
0
0
0
0
0
0
0
GP1SA
G1POL
G2POL
PCKA2
PCLK2
IOCSA
G1A16
G2A16
X1A17
X2A17
5
0
0
0
0
0
0
0
0
0
0
GP1SB
PCKA1
PCLK1
G1A15
G2A15
X1A16
X2A16
G1AV
G2AV
IOSZ
4
0
0
0
0
0
0
0
0
0
0
R
= Reserved
GCSPR
GP2SA
G1SZA
G2SZA
G1A14
G2A14
PPOL4
X1A15
X2A15
3
0
0
0
0
0
0
0
0
0
0
0
PCSEN
GP2SB
G1SZB
G2SZB
PCKB3
G1A13
G2A13
PPOL3
X1A14
X2A14
2
0
0
0
1
0
0
0
0
0
0
U = Undefined
M68HC11K Family
PCSZA
G1SZC
G2SZC
PCKB2
PPOL2
G1A12
G2A12
X1A13
X2A13
PCSA
1
0
0
0
0
0
0
0
0
0
0
MOTOROLA
PCSZB
G2SZD
G1SZD
PCKB1
PPOL1
G1A11
G2A11
PCSB
Bit 0
0
0
0
0
0
0
0
0
0
0
0
0