MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 79

• Manufacturer Part Number: MC68HC711K4CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711K4CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 24KB
• Total Internal Ram Size: 768Byte
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 84
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

4.5.4 Special Test Mode
4.5.5 Mode Selection
M68HC11K Family
MOTOROLA
For a detailed description of bootstrap mode, refer to the Motorola
application note entitled MC68HC11 Bootstrap Mode, document order
number AN1060/D.
Special test mode, a variation of the expanded mode, is used primarily
during Motorola’s internal production testing. However, for those devices
containing EPROM, it can be used to program the EPROM for program
calibration data in EEPROM and support emulation and debugging
during development.
For more detailed information, refer to
with Downloaded
The operating mode is selected by applying the appropriate logic states
to the MODA and MODB pins during reset. MODA selects single-chip
mode (0) or expanded mode (1). A logic high on MODB selects normal
modes, and vectors are fetched from memory area $FFC0–$FFFF. A
logic low on MODB selects special modes, and reset vectors are fetched
from memory area $BFC0–$BFFF. Values reflecting the selected mode
are latched into the RBOOT, SMOD, and MDA bits of the highest priority
I-bit interrupt and miscellaneous register (HPRIO) on the rising edge of
RESET.
Freescale Semiconductor, Inc.
Synchronization
For More Information On This Product,
Character
Operating Modes and On-Chip Memory
$FD
$FF
$FF
$F0
Table 4-2. Synchronization Character Selection
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Data.
4.9 characters
13 characters
4 characters
4 characters
Timeout
Delay
4.7.1 Programming the EPROM
Operating Modes and On-Chip Memory
2 MHz
7812
1200
9600
3906
Baud Rate at E Clocks
11,718
14,400
3 MHz
1800
5859
Operating Modes
Technical Data
15,624
19,200
4 MHz
2400
7812
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