MC68HC711KS2CFN3 Freescale Semiconductor, MC68HC711KS2CFN3 Datasheet - Page 207

MC68HC711KS2CFN3

Manufacturer Part Number
MC68HC711KS2CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC711KS2CFN3

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
51
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711KS2CFN3
Manufacturer:
NSC
Quantity:
1 001
Part Number:
MC68HC711KS2CFN3
Manufacturer:
FREESCA
Quantity:
3 184
9.7.4 Timer Interrupt Mask 2 Register
M68HC11K Family
MOTOROLA
Address: $0024
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2.
PAOVF — Pulse Accumulator Overflow Flag
PAOVI — Interrupt Enable Bit
PAIF — Pulse Accumulator Input Edge Flag
PAII — Interrupt Enable Bit
Reset:
Read:
Write:
The PAOVF status bit is set each time the pulse accumulator count
rolls over from $FF to $00.
If PAOVI is set, an interrupt request is also generated. If PAOVI is
cleared, pulse accumulator overflow interrupts are inhibited, and
PAOVF must be polled by user software to determine when an
overflow has occurred. In either case, software must clear PAOVF by
writing a 1 to bit 5 in the TFLG2 register.
The PAIF status bit is automatically set each time a selected edge is
detected at the PA7 pin.
If PAII is set, an interrupt request is also generated. If PAII is cleared,
pulse accumulator input interrupts are inhibited, and PAIF must be
polled by user software to determine when an input edge has been
detected. In either case, software must clear PAIF by writing a 1 to
bit 5 in the TFLG2 register.
Freescale Semiconductor, Inc.
For More Information On This Product,
Bit 7
TOI
0
Figure 9-25. Timer Interrupt Mask 2 (TMSK2)
Go to: www.freescale.com
RTII
Timing System
6
0
PAOVI
5
0
PAII
4
0
3
0
0
2
0
0
Pulse Accumulator (PA)
PR1
1
0
Timing System
Technical Data
Bit 0
PR0
0
207

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