MC68HC711KS2CFN3 Freescale Semiconductor, MC68HC711KS2CFN3 Datasheet - Page 50

• Manufacturer Part Number: MC68HC711KS2CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711KS2CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Central Processor Unit (CPU)
3.3.5 Program Counter (PC)
3.3.6 Condition Code Register (CCR)
3.3.6.1 Carry/Borrow (C)
3.3.6.2 Overflow (V)
3.3.6.3 Zero (Z)
Technical Data
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The 16-bit program counter contains the address of the next instruction
to be executed. Its initial value after reset is fetched from one of six
possible vectors, depending on operating mode and the cause of reset,
as described in
This 8-bit register contains:
Most instructions update condition codes automatically, as described in
the following paragraphs. Certain instructions, such as pushes, pulls,
add B to X (ABX), add B to Y (ABY), and transfer/exchange instructions
do not affect the condition codes.
codes are affected by each instruction.
The C bit is set if the CPU performs a carry or borrow during an
arithmetic operation. This bit also acts as an error flag for multiply and
divide operations. Shift and rotate instructions operate with and through
the carry bit to facilitate multiple-word shift operations.
The overflow bit is set if an operation results in a two’s complement
overflow of the 8-bit signed range –128 to +127. Otherwise, the V bit is
cleared.
The Z bit is set if the result of an arithmetic, logic, or data manipulation
operation is 0. Otherwise, the Z bit is cleared. Compare instructions do
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Freescale Semiconductor, Inc.
For More Information On This Product,
Five condition code indicators (C, V, Z, N, and H)
Two interrupt masking bits (IRQ and XIRQ)
A stop disable bit (S)
Central Processor Unit (CPU)
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5.3 Sources of
Resets.
Table 3-1
shows which condition
M68HC11K Family
MOTOROLA