MC68HC711KS2CFN3 Freescale Semiconductor, MC68HC711KS2CFN3 Datasheet - Page 95

MC68HC711KS2CFN3

Manufacturer Part Number
MC68HC711KS2CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC711KS2CFN3

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
51
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711KS2CFN3
Manufacturer:
NSC
Quantity:
1 001
Part Number:
MC68HC711KS2CFN3
Manufacturer:
FREESCA
Quantity:
3 184
M68HC11K Family
MOTOROLA
NOTE:
LVPI — Low-Voltage Programming Inhibit Bit
BYTE — Byte/Other EEPROM Erase Mode Bit
ROW — Row/All EEPROM Erase Mode Bit
ROW is valid only when BYTE = 0.
The BYTE and ROW bits work together to determine the scope of
erasing, as shown in
ERASE — Erase/Normal Control for EEPROM Bit
EELAT — EEPROM Latch Control Bit
EEPGM — EEPROM Program Command Bit
LVPI is a read-only bit which always reads as 0. The functionality of
this status bit was changed from early versions of the M68HC11K
Family. The low-voltage programming inhibit function is disabled on
all recent devices.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Row or bulk erase mode used
1 = Erase only one byte of EEPROM
0 = All 640 bytes of EEPROM erased
1 = Erase only one 16-byte row of EEPROM
0 = Normal read or program mode
1 = Erase mode
0 = EEPROM address and data bus configured for normal reads
1 = EEPROM address and data bus configured for programming or
0 = Program or erase voltage switched off to EEPROM array
1 = Program or erase voltage switched on to EEPROM array
Operating Modes and On-Chip Memory
erasing
BYTE
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0
0
1
1
Table 4-8. Scope of EEPROM Erase
Table
ROW
0
1
0
1
4-8.
Bulk erase; all 640 bytes
Row erase; 16 bytes
Byte erase
Byte erase
Operating Modes and On-Chip Memory
EEPROM and the CONFIG Register
Action
Technical Data
95

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