MC68HC711KS2CFN3 Freescale Semiconductor, MC68HC711KS2CFN3 Datasheet - Page 96

• Manufacturer Part Number: MC68HC711KS2CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711KS2CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Operating Modes and On-Chip Memory
4.8.1.2 Block Protect Register
Technical Data
96
Address: $0035
This register prevents inadvertent writes to both the CONFIG register
and EEPROM. The active bits in this register are initialized to 1 out of
reset and can be cleared only during the first 64 E-clock cycles after
reset in the normal modes. When these bits are cleared, the associated
EEPROM section and the CONFIG register can be programmed or
erased. EEPROM is only visible if the EEON bit in the CONFIG register
is set. The bits in the BPROT register can be written to 1 at any time to
protect EEPROM and the CONFIG register. In test or bootstrap modes,
write protection is inhibited and BPROT can be written repeatedly.
BULKP — Bulk Erase of EEPROM Protect Bit
LVPEN — Low-Voltage Programming Protect Enable Bit
BPRT[4:0] — Block Protect Bits for EEPROM Bits, see
Reset:
Read:
Write:
The functionality of LVPEN/LVPI was changed from earlier versions
of the M68HC11K Family. Setting this bit has no effect on the LVPI bit
in the PPROG register.
Freescale Semiconductor, Inc.
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0 = EEPROM can be bulk erased normally.
1 = EEPROM cannot be bulk or row erased.
0 = Low-voltage programming inhibit (LVPI) for EEPROM disabled
1 = Low-voltage programming inhibit (LVPI) for EEPROM disabled
0 = Protection disabled for associated block
1 = Protection enabled for associated block
Operating Modes and On-Chip Memory
BULKP
Bit 7
1
Figure 4-10. Block Protect Register (BPROT)
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LVPEN
6
1
BPRT4
5
1
PTCON
4
1
BPRT3
3
1
BPRT2
2
1
Table 4-9
M68HC11K Family
BPRT1
1
1
MOTOROLA
BPRT0
Bit 0
1