N80C251SB16 Intel, N80C251SB16 Datasheet

N80C251SB16

Manufacturer Part Number
N80C251SB16
Description
Manufacturer
Intel
Datasheet

Specifications of N80C251SB16

Cpu Family
MCS251
Device Core Size
8b
Frequency (max)
16MHz
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

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This document contains information on products with “[M] [C] '94 '95 C” as the last line of the top marking
diagram.
code compatible with MCS 51 microcontrollers and pin compatible with 40-lead PDIP and 44-lead PLCC
MCS 51 microcontrollers. MCS 251 microcontrollers feature an enriched instruction set, linear addressing,
and efficient C-language support. The 8XC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip RAM and is
available
ROM/OTPROM/EPROM. A variety of features can be selected by new user-programmable configurations.
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of
any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products.
Intel retains the right to make changes to these specifications at any time, without notice. Microcontroller products may have minor varia-
tions to this specification known as errata.
COPYRIGHT © INTEL CORPORATION,
Real Time and Programmed Wait State
Bus Operation
Binary-code Compatible with MCS 51
Pin Compatible with 44-lead PLCC and
40-lead PDIP MCS 51 Sockets
Register-based MCS 251 Architecture
— 40-byte Register File
— Registers Accessible as Bytes, Words,
Enriched MCS 51 Instruction Set
— 16-bit and 32-bit Arithmetic and Logic
— Compare and Conditional Jump
— Expanded Set of Move Instructions
Linear Addressing
256-Kbyte Expanded External Code/Data
Memory Space
ROM/OTPROM/EPROM Options:
16 Kbytes (SB/SQ), 8 Kbytes (SA/SP), or
without ROM/OTPROM/EPROM
16-bit Internal Code Fetch
64-Kbyte Extended Stack Space
On-chip Data RAM Options:
1-Kbyte (SA/SB) or 512-Byte (SP/SQ)
8-bit, “Min” 2-clock External Code Fetch
in
Page Mode
and Double Words
Instructions
Instructions
A member of the Intel family of 8-bit MCS 251 microcontrollers, the 8XC251SA/SB/SP/SQ is binary-
with
8
Kbytes
CHMOS MICROCONTROLLER
®
or
HIGH-PERFORMANCE
8XC251SA/SB/SP/SQ
2004
16
Commercial/Express
Kbytes
®
July 2004
of
on-chip
User-selectable Configurations:
— External Wait States (0-3 wait states)
— Address Range & Memory Mapping
— Page Mode
32 Programmable I/O Lines
Seven Maskable Interrupt Sources
with Four Programmable Priority
Levels
Three Flexible 16-bit Timer/counters
Hardware Watchdog Timer
Programmable Counter Array
— High-speed Output
— Compare/Capture Operation
— Pulse Width Modulator
— Watchdog Timer
Programmable Serial I/O Port
— Framing Error Detection
— Automatic Address Recognition
High-performance CHMOS Technology
Static Standby to 16-MHz Operation
Complete System Development
Support
— Compatible with Existing Tools
— New MCS 251 Tools Available:
Package Options (PDIP, PLCC, and
Ceramic DIP)
Fast MCS 251 Instruction Pipeline
Compiler, Assembler, Debugger, ICE
ROM/OTPROM/EPROM,
Order Number: 272783-004
or
without

Related parts for N80C251SB16

N80C251SB16 Summary of contents

Page 1

... Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make changes to these specifications at any time, without notice. Microcontroller products may have minor varia- tions to this specification known as errata. COPYRIGHT © ...

Page 2

HIGH-PERFORMANCE CHMOS MICROCONTROLLER System Bus and I/O Ports P0.7:0 P2.7:0 OTPROM/ROM Port 0 Port 2 Drivers Drivers Memory Data (16) Memory Address (16) Bus Interface Code Bus (16) Code Address (24) Instruction Sequencer SRC1 (8) SRC2 (8) Register ALU ...

Page 3

... PROCESS INFORMATION This device is manufactured on a complimentary high-performance metal-oxide (CHMOS) process. Additional process and reliability information is available in Intel’s Components Quality and Reliability Handbook (order number 210997). All thermal impedance data is approximate for static air conditions at 1 watt of power dissipation. Values change depending on operating conditions and application requirements ...

Page 4

... Nomenclature Description Commercial operating temperature range (0°C to 70°C) with Intel standard burn-in. X Express operating temperature range (-40°C to 85°C) with Intel standard burn-in. X 44-lead Plastic Leaded Chip Carrier (PLCC) X 40-lead Plastic Dual In-line Package (PDIP) X 40-lead Ceramic Dual In-line Package (Ceramic DIP) ...

Page 5

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 5. 8XC251SA/SB/SP/SQ Memory Map Internal Address) FF:FFFFH External Memory (FF:FFF8H–FF:FFFFH are internally decoded for Configuration FF:4000H Byte data in all ROM/OTPROM/EPROM devices with EA For all devices with EA the last ...

Page 6

HIGH-PERFORMANCE CHMOS MICROCONTROLLER 8XC251SA/SB/SP/SQ 44-lead PLCC Package P1.5 / CEX2 P1.6 / CEX3 / WAIT# P1.7 / CEX4 / A17 / WCLK P3.0 / RXD P3.1 / TXD P3.2 / INT0# P3.3 / INT1# Figure 3. 8XC251SA/SB/SP/SQ 44-lead PLCC ...

Page 7

HIGH-PERFORMANCE CHMOS MICROCONTROLLER P1 P1.1 / T2EX 2 P1.2 / ECI 3 P1.3 / CEX0 4 P1.4 / CEX1 5 P1.5 / CEX2 6 P1.6 / CEX3 / WAIT# 7 P1.7 / CEX4 / A17 / ...

Page 8

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 6. PLCC/DIP Lead Assignments Listed by Functional Category Address & Data Name AD0/P0.0 AD1/P0.1 AD2/P0.2 AD3/P0.3 AD4/P0.4 AD5/P0.5 AD6/P0.6 AD7/P0.7 A8/P2.0 A9/P2.1 A10/P2.2 A11/P2.3 A12/P2.4 A13/P2.5 A14/P2.6 A15/P2.7 P3.7/RD#/A16 P1.7/CEX4/A17/WCLK Processor Control Name P3.2/INT0# P3.3/INT1# ...

Page 9

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 7. Lead Assignments Arranged by Lead Number PLCC DIP Name P1.0/ P1.1/T2EX 4 3 P1.2/ECI 5 4 P1.3/CEX0 6 5 P1.4/CEX1 7 6 P1.5/CEX2 8 7 P1.6/CEX3/WAIT# ...

Page 10

HIGH-PERFORMANCE CHMOS MICROCONTROLLER SIGNAL DESCRIPTIONS Signal Type Name A17 O 18th Address Bit (A17). Output to memory as 18th external address bit (A17) in extended bus applications, depending on the values of bits RD0 and RD1 in configuration byte ...

Page 11

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 8. Signal Descriptions (Continued) Signal Type Name P3.0 I/O Port 3. This is an 8-bit, bidirectional I/O port with internal pullups. P3.1 P3.3:2 P3.5:4 P3.6 P3.7 PSEN# O Program Store Enable. Read signal output. This ...

Page 12

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 8. Signal Descriptions (Continued) Signal Type Name V GND Secondary Ground. This ground is provided to reduce ground bounce 1 SS and improve power supply bypassing. Connection of this pin to ground is recommended. However, ...

Page 13

... Do not finalize a design with this information. Revised information will be published when the product is available +13.0 V Verify with your local Intel Sales Office that -0 +6.5 V you have the latest datasheet before finaliz- ing a design. † WARNING: Stressing the device beyond the “Absolute Maximum Ratings” ...

Page 14

HIGH-PERFORMANCE CHMOS MICROCONTROLLER D.C. Characteristics Parameter values apply to all devices unless otherwise indicated. Table 10. DC Characteristics at V Symbol Parameter V Input Low Voltage IL (except EA#) V Input Low Voltage 1 IL (EA#) V Input High ...

Page 15

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 10. DC Characteristics at V Symbol Parameter V Output High Voltage 1 OH (Port 0 in External Address) V Output High Voltage oh2 (Port 2 in External Address during Page Mode) I Logical 0 Input ...

Page 16

HIGH-PERFORMANCE CHMOS MICROCONTROLLER (NC) All other 8XC251SA/SB/SP/SQ pins are unconnected. Figure 5. I Test Condition, Powerdown Mode EA# RST 8XC251SA 8XC251SB 8XC251SP 8XC251SQ XTAL2 XTAL1 2.0 ...

Page 17

HIGH-PERFORMANCE CHMOS MICROCONTROLLER A.C. Characteristics Table 11 lists AC timing parameters for the 8XC251SA/SB/SP/SQ with no wait states. External wait states can be added PSEN#/RD#/WR# and/or by extending ALE. In the table, Notes 3 and 5 mark parameters affected ...

Page 18

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 11. AC Characteristics (Capacitive Loading = 50 pF) (Continued) Symbol Parameter T (2) RD#/PSEN# Low to valid Data/Instruction In RLDV @ 12 MHz @ 16 MHz T (2) Data/Instruction Hold Time. Occurs after RHDX RD#/PSEN# ...

Page 19

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 11. AC Characteristics (Capacitive Loading = 50 pF) (Continued) Symbol Parameter T (2) Address Valid to RD#/PSEN# Low avrl @ 12 MHz @ 16 MHz T Address (P0) Valid to WR# Low avwl1 @ 12 ...

Page 20

HIGH-PERFORMANCE CHMOS MICROCONTROLLER SYSTEM BUS TIMINGS XTAL1 ALE T LHLL † RD#/PSEN# T AVLL † P0 P2/A16/A17 † The value of this parameter depends on wait states. See the table of AC characteristics. Figure 6. External Read Data Bus ...

Page 21

HIGH-PERFORMANCE CHMOS MICROCONTROLLER XTAL1 ALE T LHLL † T LLRL † RD#/PSEN# T AVLL † AVRL † P2/A16/A17 † The value of this parameter depends on wait states. See the table of AC characteristics. Figure 7. External ...

Page 22

HIGH-PERFORMANCE CHMOS MICROCONTROLLER XTAL1 ALE T LHLL † WR# T AVLL † AVWL2 † P2/A16/A17 † The value of this parameter depends on wait states. See the table of AC characteristics. Figure 8. External Write Data Bus ...

Page 23

HIGH-PERFORMANCE CHMOS MICROCONTROLLER XTAL1 ALE T LHLL † T LLRL † RD#/PSEN# T AVLL † AVRL † P0/A16/A17 † The value of this parameter depends on wait states. See the table of AC characteristics. Figure 9. External ...

Page 24

HIGH-PERFORMANCE CHMOS MICROCONTROLLER XTAL1 ALE T LHLL † WR# T AVLL † AVWL2 † P0/A16/A17 † The value of this parameter depends on wait states. See the table of AC characteristics. Figure 10. External Write Data Bus ...

Page 25

HIGH-PERFORMANCE CHMOS MICROCONTROLLER XTAL1 ALE T LHLL † RD#/PSEN# T AVLL † AVRL † P0/A16/A17 Page Miss †† † The value of this parameter depends on wait states. See the table of AC characteristics. †† A page ...

Page 26

HIGH-PERFORMANCE CHMOS MICROCONTROLLER AC Characteristics — Serial Port Table 12. Serial Port Timing — Shift Register Mode Symbol Parameter T Serial Port Clock Cycle Time XLXL T Output Data Setup to Clock Rising Edge QVSH T Output Data hold ...

Page 27

HIGH-PERFORMANCE CHMOS MICROCONTROLLER External Clock Drive Symbol Parameter 1/T Oscillator Frequency (F CLCL T High Time CHCX T Low Time CLCX T Rise Time CLCH T Fall Time CHCL V – 0 0.2 V – ...

Page 28

HIGH-PERFORMANCE CHMOS MICROCONTROLLER V + 0.1 V LOAD V LOAD V – 0.1 V LOAD For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when ...

Page 29

HIGH-PERFORMANCE CHMOS MICROCONTROLLER PROGRAMMING AND VERIFYING NONVOLATILE MEMORY The 87C251SA/SB/SP/SQ has several areas of nonvolatile memory that can be programmed and/or verified: on-chip code memory (16 Kbytes), lock bits (3 bits), encryption array (128 bytes), and signature bytes (3 ...

Page 30

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Table 14. Programming and Verification Modes 8XC251SA/S B/SP/SQ Mode Program on-chip code Y memory Verify on-chip code Y memory Program configuration bytes Verify configuration bytes Program lock bits Y Verify lock bits Y ...

Page 31

HIGH-PERFORMANCE CHMOS MICROCONTROLLER UCONFIG0 7 UCON WSA1# WSA0# Bit Bit Number Mnemonic 7 UCON Configuration byte location selector: Clearing this bit causes the device to fetch configuration information from on-chip memory. Setting this bit causes the device to locate ...

Page 32

HIGH-PERFORMANCE CHMOS MICROCONTROLLER . UCONFIG1 7 — — — Bit Bit Mnemonic Number 7:5 — Reserved; set these bits when writing to UCONFIG1. 4 INTR Interrupt Mode: If this bit is set, interrupts push 4 bytes onto the stack ...

Page 33

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Programming Cycle P1, P3 Address (16 Bits) P2 Data In (8 Bits) T DVGL T AVGL T GHGL PROG GLGH T SHGL 12.75V EA#/ EHSH P0 Figure 19. Timing for ...

Page 34

... OSC 48T OSC 48T OSC 48T OSC Enable G = PROG Valid Longer Valid PP DEVICE TYPE Indicates Intel Devices Indicates MCS251 core product Indicates 83C251SA device Indicates 83C251SB device Indicates 83C251SP device Indicates 83C251SQ device Indicates 87C251SA device Indicates 87C251SB device Indicates ...

Page 35

HIGH-PERFORMANCE CHMOS MICROCONTROLLER Revision History The following changes appear in the -004 datasheet address the fact that many of the package prefix variables have changed, all package prefix variables in the document are now indicated with an ...

Page 36

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