ISP1761BE STEricsson, ISP1761BE Datasheet - Page 142

• Manufacturer Part Number: ISP1761BE
• Manufacturer: STEricsson

Specifications of ISP1761BE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

NXP Semiconductors
ISP1761_5
Product data sheet
15.1.2.4 Multi-cycle: DMA write
Table 174. DMA write (multi-cycle burst)
T
Symbol Parameter
V
T
t
t
t
t
t
t
t
t
t
V
T
t
t
t
t
t
t
t
t
t
su17
h17
a17
a27
a37
h27
a47
w17
a57
su17
h17
a17
a27
a37
h27
a47
w17
a57
amb
Fig 27. DMA write (multi-cycle burst)
cy17
cy17
CC(I/O)
CC(I/O)
= 40 C to +85 C; unless otherwise specified.
= 1.65 V to 1.95 V
= 3.3 V to 3.6 V
DMA write cycle time
data set-up time before WR_N de-assertion
data hold time after WR_N de-assertion
DACK assertion time after DREQ assertion
WR_N assertion time after DACK assertion
DREQ de-assertion time at last strobe (WR_N)
assertion
DACK hold time after WR_N de-assertion
strobe de-assertion to next strobe assertion time
WR_N pulse width
DACK de-assertion to next DREQ assertion time
DMA write cycle time
data set-up time before WR_N de-assertion
data hold time after WR_N de-assertion
DACK assertion time after DREQ assertion
WR_N assertion time after DACK assertion
DREQ de-assertion time at last strobe (WR_N)
assertion
DACK hold time after WR_N de-assertion
strobe de-assertion to next strobe assertion time
WR_N pulse width
DACK de-assertion to next DREQ assertion time
WR_N
DREQ
DACK
DATA
Rev. 05 — 13 March 2008
t
a17
t
a27
data 1
t
su17
t
t
a47
h17
T
cy17
t
w17
data 2
data n-1
Min
51
5
2
0
2
-
0
34
17
-
51
5
2
0
1
-
0
34
17
-
Hi-Speed USB OTG controller
t
a37
data n
Max
-
-
-
-
-
28
-
-
-
82
-
-
-
-
-
16
-
-
-
82
t
a57
t
004aaa526
© NXP B.V. 2008. All rights reserved.
h27
ISP1761
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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