ISP1761BE STEricsson, ISP1761BE Datasheet - Page 50

• Manufacturer Part Number: ISP1761BE
• Manufacturer: STEricsson

Specifications of ISP1761BE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

NXP Semiconductors
Table 45.
[1]
Table 47.
ISP1761_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
Memory register (address 033Ch) bit allocation
Edge Interrupt Count register (address 0340h) bit allocation
8.3.9 Edge Interrupt Count register
R/W
R/W
R/W
R/W
R/W
R/W
31
23
15
31
23
0
0
0
7
0
0
0
The bit description of the register is given in
Table 46.
Table 47
Bit
31 to 18 -
17 to 16 MEM_BANK_
15 to 0
R/W
R/W
R/W
R/W
R/W
R/W
30
22
14
30
22
0
0
0
6
0
0
0
shows the bit allocation of the register.
Symbol
SEL[1:0]
START_ADDR_
MEM_READ
[15:0]
Memory register (address 033Ch) bit description
R/W
R/W
R/W
R/W
R/W
R/W
29
21
13
29
21
0
0
0
5
0
0
0
reserved
Rev. 05 — 13 March 2008
START_ADDR_MEM_READ[15:8]
START_ADDR_MEM_READ[7:0]
Description
reserved
Memory Bank Select: Up to four memory banks can be selected. For
details on internal memory read description, see
Applicable to PIO mode memory read or write data transfers only.
Start Address for Memory Read Cycles: The start address for a
series of memory read cycles at incremental addresses in a
contiguous space. Applicable to PIO mode memory read data
transfers only.
[1]
R/W
R/W
R/W
R/W
R/W
R/W
MIN_WIDTH[7:0]
28
20
12
28
20
0
0
0
4
0
0
0
reserved
reserved
[1]
[1]
R/W
R/W
R/W
R/W
R/W
R/W
Table
27
19
11
27
19
0
0
0
3
0
0
0
45.
R/W
R/W
R/W
R/W
R/W
R/W
26
18
10
26
18
0
0
0
2
0
0
0
Hi-Speed USB OTG controller
MEM_BANK_SEL[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
25
17
25
17
0
0
9
0
1
0
0
0
Section
© NXP B.V. 2008. All rights reserved.
ISP1761
7.3.1.
R/W
R/W
R/W
R/W
R/W
R/W
49 of 163
24
16
24
16
0
0
8
0
0
0
0
0