ISP1761BE STEricsson, ISP1761BE Datasheet - Page 72

• Manufacturer Part Number: ISP1761BE
• Manufacturer: STEricsson

Specifications of ISP1761BE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

NXP Semiconductors
Table 68.
ISP1761_5
Product data sheet
Bit
DW3
63
62
61 to 58 reserved
57
56 to 55 Cerr[1:0]
54 to 47 reserved
46 to 32 NrBytes
DW2
31 to 24 reserved
23 to 8
7 to 0
DW1
63 to 47 reserved
46
45 to 44 EPType[1:0]
43 to 42 Token[1:0]
41 to 35 DeviceAddress
34 to 32 EndPt[3:1]
DW0
31
Symbol
A
H
DT
Transferred
[14:0]
DataStart
Address[15:0]
S
[6:0]
EndPt[0]
High-speed interrupt IN and OUT: bit description
Frame[7:0]
Access
HW — writes
SW — writes
HW — writes
-
HW — writes
SW — writes
HW — writes
SW — writes
-
HW — writes
-
SW — writes
SW — writes
-
SW — writes
SW — writes
SW — writes
SW — writes
SW — writes
SW — writes
Value Description
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 05 — 13 March 2008
Active: Write the same value as that in V.
Halt: Transaction is halted.
-
Data Toggle: Set the Data Toggle bit to start the PTD. Software
writes the current transaction toggle value. Hardware writes the next
transaction toggle value.
Error Counter: This field corresponds to the Cerr[1:0] field in TD. The
default value of this field is zero for isochronous transactions.
-
Number of Bytes Transferred: This field indicates the number of
bytes sent or received for this transaction. If Mult[1:0] is greater than
one, it is possible to store intermediate results in this field.
-
Data Start Address: This is the start address for data that will be
sent or received on or from the USB bus. This is the internal memory
address and not the direct CPU address.
RAM address = (CPU address
Bits 7 to 3 represent the polling rate in milliseconds.
The INT polling rate is defined as 2
When b is 1, 2, 3 or 4, use SA to define polling because the rate is
equal to or less than 1 ms. Bits 7 to 3 are set to 0. Polling checks SA
bits for SOF rates. See
-
This bit indicates if a split transaction has to be executed:
0 — High-speed transaction
1 — Split transaction
Endpoint type:
11 — Interrupt
Token: This field indicates the token PID for this transaction:
00 — OUT
01 — IN
Device Address: This is the USB address of the function containing
the endpoint that is referred to by the buffer.
Endpoint: This is the USB address of the endpoint within the
function.
Endpoint: This is the USB address of the endpoint within the
function.
…continued
Table
69.
400h) / 8
Hi-Speed USB OTG controller
(b - 1)
SOF, where b is 1 to 9.
© NXP B.V. 2008. All rights reserved.
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