HEF40193BP NXP Semiconductors, HEF40193BP Datasheet

HEF40193BP

Manufacturer Part Number
HEF40193BP
Description
Manufacturer
NXP Semiconductors
Type
Binaryr
Datasheet

Specifications of HEF40193BP

Technology
CMOS
Number Of Elements
1
Number Of Bits
4
Logic Family
4000
Logical Function
Counter
Operating Supply Voltage (typ)
3.3/5/9/12V
Output Type
Standard
Package Type
PDIP
Propagation Delay Time
425ns
Operating Temp Range
-40C to 85C
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
15V
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
16
Lead Free Status / Rohs Status
Compliant

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Part Number:
HEF40193BP
Quantity:
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HEF40193BP
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PHI
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6 224
1. General description
2. Features
3. Applications
The HEF40193B is a 4-bit synchronous up/down binary counter. The counter has a
count-up clock input (CPU), a count-down clock input (CPD), an asynchronous parallel
load input (PL), four parallel data inputs (D0 to D3), an asynchronous master reset input
(MR), four counter outputs (Q0 to Q3), an active LOW terminal count-up (carry) output
(TCU), and an active LOW terminal count-down (borrow) output (TCD).
The counter outputs change state on the LOW-to-HIGH transition of either clock input.
However, for correct counting, both clock inputs cannot be LOW simultaneously. The
outputs TCU and TCD are normally HIGH. When the circuit has reached the maximum
count state of ‘15’, the next HIGH-to-LOW transition of CPU will cause TCU to go LOW.
TCU will stay LOW until CPU goes HIGH again. Likewise, output TCD will go LOW when
the circuit is in the zero state and CPD goes LOW. When PL is LOW, the information on
D0 to D3 is asynchronously loaded into the counter. A HIGH on MR resets the counter
independent of all other input conditions. The counter stages are of a static toggle type
flip-flop.
It operates over a recommended V
(usually ground). Unused inputs must be connected to V
also suitable for use over the industrial (−40 °C to +85 °C) temperature range.
HEF40193B
4-bit up/down binary counter
Rev. 06 — 22 December 2009
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the automotive temperature range −40 °C to +85 °C
Complies with JEDEC standard JESD 13-B
Industrial
DD
power supply range of 3 V to 15 V referenced to V
DD
, V
SS
, or another input. It is
Product data sheet
SS

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HEF40193BP Summary of contents

Page 1

HEF40193B 4-bit up/down binary counter Rev. 06 — 22 December 2009 1. General description The HEF40193B is a 4-bit synchronous up/down binary counter. The counter has a count-up clock input (CPU), a count-down clock input (CPD), an asynchronous parallel load ...

Page 2

... Table 1. Ordering information − ° All types operate from +85 Type number Package Name Description HEF40193BP DIP16 plastic dual in-line package; 16 leads (300 mil) HEF40193BT SO16 plastic small outline package; 16 leads; body width 3 Functional diagram Fig 1. Functional diagram HEF40193B_6 Product data sheet ° ...

Page 3

FF1 Fig 2. Logic diagram FF2 FF3 CPD ...

Page 4

... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin 15, 1, 10, 9 CPU 5 CPD TCU 12 TCD HEF40193B_6 Product data sheet HEF40193B CPD TCD CPU 5 12 TCU 001aae581 Description parallel data input count-up clock pulse input (LOW-to-HIGH, edge-triggered) ...

Page 5

... NXP Semiconductors 7. Functional description [1] Table 3. Function table HIGH voltage level LOW voltage level don’t care; ↑ = positive-going transition. [ CPU CPD TCU TCD COUNT 0 Fig 4. Timing diagram HEF40193B_6 Product data sheet CPU CPD ↑ H ↑ Rev. 06 — 22 December 2009 HEF40193B 4-bit up/down binary counter ...

Page 6

... NXP Semiconductors Logic equations for terminal count: • • • TCU = • • • TCD = Fig 5. State diagram 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage DD I input clamping current IK V input voltage ...

Page 7

... NXP Semiconductors Table 5. Recommended operating conditions Symbol Parameter Δt/ΔV input transition rise and fall rate 10. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol Parameter V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage ...

Page 8

... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions t HIGH to LOW CPU to Qn; PHL propagation delay see CPD to Qn; see CPU to TCU; see CPD to TCD; see MR to Qn; see MR to TCD PL → Qn HEF40193B_6 Product data sheet Figure 7 ...

Page 9

... NXP Semiconductors Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions t LOW to HIGH CPU to Qn; PLH propagation delay see CPD to Qn; see CPU to TCU; see CPD to TCD; see MR to TCU transition time see t f maximum frequency see max ...

Page 10

... NXP Semiconductors Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions t set-up time Dn to PL; su see t hold time Dn to PL; h see [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C Table 8. ...

Page 11

... NXP Semiconductors 12. Waveforms input CPU or CPD V M input PHL V I TCU input TCD input PLH output Propagation delays and output transition times V I CPU or CPD input input input input and MR recovery times, CPU, CPD, PL and MR minimum pulse widths, and set-up and hold times ...

Page 12

... NXP Semiconductors negative positive a. Input waveforms b. Test circuit Test data is given in Table 9. Definitions for test circuit Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z T Fig 7. Test circuit for switching times Table 9. Measurement points and test data ...

Page 13

... NXP Semiconductors 13. Application information Some examples of applications for the HEF40193B are: • Up/down difference counting • Multistage ripple counting • Multistage synchronous counting D0 clock up CPU clock down CPD Fig 8. Example of cascaded HEF40193B ICs HEF40193B_6 Product data sheet TCU CPU HEF40193B HEF40193B ...

Page 14

... NXP Semiconductors 14. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT b max. min. max. 1.73 mm 4.2 0.51 3.2 1.30 0.068 inches 0.17 0.02 0.13 0.051 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 15

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 16

... NXP Semiconductors 15. Revision history Table 10. Revision history Document ID Release date HEF40193B_6 20091222 • Modifications: Section 2 “Features” • Section 9 “Recommended operating conditions” • Abbreviations section removed. HEF40193B_5 20090615 HEF40193B_4 20090505 HEF40193B_CNV_3 19950101 HEF40193B_CNV_2 19950101 HEF40193B_6 Product data sheet Data sheet status ...

Page 17

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 18

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 13 Application information Package outline ...

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