MC14490L ON Semiconductor, MC14490L Datasheet

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MC14490L

Manufacturer Part Number
MC14490L
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC14490L

Lead Free Status / Rohs Status
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MC14490
Hex Contact Bounce
Eliminator
mode devices, and is used for the elimination of extraneous level changes
that result when interfacing with mechanical contacts. The digital contact
bounce eliminator circuit takes an input signal from a bouncing contact
and generates a clean digital signal four clock periods after the input has
stabilized. The bounce eliminator circuit will remove bounce on both the
“make” and the “break” of a contact closure. The clock for operation of
the MC14490 is derived from an internal R−C oscillator which requires
only an external capacitor to adjust for the desired operating frequency
(bounce delay). The clock may also be driven from an external clock
source or the oscillator of another MC14490 (see Figure 5).
indeterminate states.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
(e.g., either V
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 7
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input Current (DC or Transient) per Pin
Power Dissipation, per Package (Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature (8−Second Soldering)
The MC14490 is constructed with complementary MOS enhancement
NOTE: Immediately after powerup, the outputs of the MC14490 are in
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
Diode Protection on All Inputs
Six Debouncers Per Package
Internal Pullups on All Data Inputs
Can Be Used as a Digital Integrator, System Synchronizer, or Delay Line
Internal Oscillator (R−C), or External Clock Source
TTL Compatible Data Inputs/Outputs
Single Line Input, Debounces Both “Make” and “Break” Contacts
Does Not Require “Form C” (Single Pole Double Throw) Input Signal
Cascadable for Longer Time Delays
Schmitt Trigger on Clock Input (Pin 7)
Supply Voltage Range = 3.0 V to 18 V
Chip Complexity: 546 FETs or 136.5 Equivalent Gates
Pb−Free Packages are Available*
Packages: – 7.0 mW/_C From 65_C To 125_C
SS
SS
Parameter
or V
v (V
DD
in
). Unused outputs must be left open.
or V
(Voltages Referenced to V
out
) v V
DD
.
Symbol
V
in
in
V
T
P
, V
T
T
I
and V
stg
DD
in
A
D
L
out
SS
out
)
−0.5 to +18.0
−0.5 to V
−55 to +125
−65 to +150
should be constrained
Value
+ 0.5
± 10
500
260
DD
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
1
1
1
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W = Work Week
G
http://onsemi.com
DW SUFFIX
CASE 751G
SOEIAJ−16
CASE 648
CASE 966
P SUFFIX
F SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Pb−Free Package
SOIC−16
PDIP−16
Publication Order Number:
16
16
16
1
1
1
DIAGRAMS
AWLYYWWG
MARKING
AWLYYWWG
MC14490P
MC14490
ALYWG
MC14490/D
14490

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