PCF85116-3N NXP Semiconductors, PCF85116-3N Datasheet
PCF85116-3N
Specifications of PCF85116-3N
Related parts for PCF85116-3N
PCF85116-3N Summary of contents
Page 1
... The data bytes received will not be acknowledged by the PCF85116-3 and the EEPROM contents are not changed. Remark: The PCF85116-3 is pin and address compatible to the PCx85xxC-2 family. The PCF85116-3 covers the whole address space of 16 kbits; address inputs are no longer needed. Therefore, pins are not connected. The write-protection input (WP pin 7. ...
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... Ordering information Package Name Description DIP8 plastic dual in-line package; 8 leads (300 mil) SO8 plastic small outline package; 8 leads; body width 3.9 mm Ordering options Topside mark PCF85116-3 85116-3 Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface = 22 C amb Min Typ Max Unit 2 ...
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... I C-BUS CONTROL LOGIC ADDRESS SHIFT COMPARATOR REGISTER 5 COLUMN DECODER HV GENERATOR PAGE REGISTER EEPROM ARRAY ROW (8 256 8) DEC Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface WP 7 ADDRESS POINTER SEQUENCER DIVIDER 6 OSCILLATOR 002aaa338 © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
Page 4
... HIGH write-protection input 8 positive supply voltage MEM SEL 2 MEM SEL 1 MEM SEL 0 Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface SCL 6 5 SDA 2 C-bus) 2 C-bus) Chip enable R/W B2 ...
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... Within the I fast-speed mode (400 kHz clock rate) and a high-speed mode (3.2 MHz clock rate) are defined. The PCF85116-3 operates in only the standard and fast-speed modes. By definition, a device that sends a signal is called a ‘transmitter’, and the device which receives the signal is called a ‘receiver’. The device which controls the signal is called the ‘ ...
Page 6
... Page write: initiated in the same manner as the byte write operation. The master can transmit data bytes within one transmission. After receipt of each byte, the PCF85116-3 will respond with an acknowledge. The master terminates the transfer by generating a STOP condition. The maximum total E/W time in this mode is 10 ms. ...
Page 7
... Remark: Write accesses to the EEPROM are enabled if the pin WP is LOW. When WP is HIGH the EEPROM is write-protected and no acknowledge will be given by the PCF85116-3 when data is sent. However, an acknowledge will be given after the slave address and the word address. Fig 5. Auto increment memory address; two byte write. ...
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... Contrary to write operations, an overflow of the memory address occurs from 2047 to 0 (see 9397 750 14217 Product data 2048 8-bit CMOS EEPROM with I Figure Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface 8). © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
Page 9
... Philips Semiconductors Fig 7. Master reads PCF85116-3 slave after setting word address (write word address; read data); sequential read SLAVE ADDRESS Fig 8. Master reads PCF85116-3 immediately after first byte (read mode); current address read. 9397 750 14217 Product data 2048 8-bit CMOS EEPROM with I ...
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... ESD human body model Q22 at T amb 9397 750 14217 Product data 2048 8-bit CMOS EEPROM with I Conditions Z > 500 i [ discharge procedure according to MIL-STD-883C Method 3015. Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface Min Max 0.3 +6.5 V 0.8 +6 ...
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... Conditions f = 400 kHz; SCL 400 kHz; SCL DD(min mA DD(min [ ILmax OL1 OL2 amb = total capacitance of one bus line in pF). b Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface Min Typ Max Unit 2 0 0. 0.1C - 250 0.1C - ...
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... CMOS EEPROM with I ; see Figure 9. DD Conditions Standard mode Min 0 4.7 4.0 4.7 4.0 repeated start 4.7 5 [1] 0 250 - - 4 HIGH t t HD;DAT SU;DAT 2 C-bus. Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface and V IL Fast mode Max Min Max 100 0 400 - ...
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... E/W 9397 750 14217 Product data 2048 8-bit CMOS EEPROM with I 2 C-bus logic with a set-up time Enabling the chip is achieved by connecting Conditions +85 C amb amb Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface Min Typ Max - - 10 100000 - - 1000000 - - © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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... 0.25 5.0 4.0 6.2 1.27 1.05 0.19 4.8 3.8 5.8 0.0100 0.20 0.16 0.244 0.05 0.041 0.0075 0.19 0.15 0.228 REFERENCES JEDEC JEITA MS-012 Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface SOT96 detail X ( 1.0 0.7 0.7 0.25 0.25 0.1 0.4 0.6 ...
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... REFERENCES JEDEC JEITA MO-001 SC-504-8 Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface SOT97 ( max. 3.60 8.25 10.0 7.62 0.254 1.15 3 ...
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... C (SnPb process) or below 245 C (Pb-free process) – for all the BGA and SSOP-T packages 9397 750 14217 Product data 2048 8-bit CMOS EEPROM with I Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface ). stg(max) © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
Page 17
... When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 9397 750 14217 Product data 2048 8-bit CMOS EEPROM with I 2 called small/thin packages. Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface 3 350 mm so called © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
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... HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS [7] PLCC , SO, SOJ suitable LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO, not recommended VSSOP Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface [2] Reflow Dipping [3] suitable not suitable suitable [6] suitable suitable [7][8] ...
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... Section 8.1.2 “Data transfer” on page 03 20020819 - Product data (9397 750 10249); Engineering Change Notice 853-2356 28772; supersedes data in data sheet PCF85116-3_2 dated 1997 Apr 02 (9397 750 01994). 9397 750 14217 Product data 2048 8-bit CMOS EEPROM with I 2: Table 3 “Ordering options” on page 2 5: third paragraph re-written. Rev. 04 — ...
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... Licenses Purchase of Philips I Rev. 04 — 25 October 2004 PCF85116-3 2 C-bus interface 2 C components 2 Purchase of Philips I ...
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... Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 25 October 2004 Document order number: 9397 750 14217 PCF85116-3 2048 8-bit CMOS EEPROM with I 2 C-bus interface ...