ISP1761ET NXP Semiconductors, ISP1761ET Datasheet - Page 82

no-image

ISP1761ET

Manufacturer Part Number
ISP1761ET
Description
USB Interface IC USB 2.0 HS OTG HOST
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1761ET

Operating Supply Voltage
1.65 V to 3.6 V
Lead Free Status / Rohs Status
 Details
Other names
ISP1761ET,557

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1761ET
Manufacturer:
NXP
Quantity:
853
Part Number:
ISP1761ET
Manufacturer:
ST
0
Part Number:
ISP1761ET
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Part Number:
ISP1761ET-S
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
ISP1761ETGE
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
ISP1761ETUM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
NXP Semiconductors
Table 76.
ISP1761_4
Product data sheet
Bit
DW7
63 to 40
39 to 32
DW6
31 to 24
23 to 16
15 to 8
7 to 0
DW5
63 to 56
55 to 48
47 to 40
39 to 32
DW4
31 to 29
28 to 26
25 to 23
22 to 20
19 to 17
16 to 14
13 to 11
10 to 8
Symbol
reserved
INT_IN_7[7:0]
INT_IN_6[7:0]
INT_IN_5[7:0]
INT_IN_4[7:0]
INT_IN_3[7:0]
INT_IN_2[7:0]
INT_IN_1[7:0]
INT_IN_0[7:0]
Status7[2:0]
Status6[2:0]
Status5[2:0]
Status4[2:0]
Status3[2:0]
Status2[2:0]
Status1[2:0]
Status0[2:0]
Start and complete split for interrupt: bit description
SCS[7:0]
Access
-
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
SW — writes
(0
HW — writes
(1
After processing
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
1)
0)
Value
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 04 — 5 March 2007
Description
-
Bytes received during SOF7, if SA[7] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during SOF6, if SA[6] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during SOF5, if SA[5] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during SOF4, if SA[4] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during SOF3, if SA[3] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during SOF2 (bits 7 to 0), if SA[2] is set to 1
and frame number is correct. The new value continuously
overwrites the old value.
Bytes received during SOF1, if SA[1] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during SOF0 if SA[0] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
All bits can be set to one for every transfer. It specifies which
split and complete split active bits, SA = 0000 0001 and SCS =
0000 0100, will cause SS to execute in Frame0 and CS in
Interrupt IN or OUT status of SOF7
Interrupt IN or OUT status of SOF6
Interrupt IN or OUT status of SOF5
Interrupt IN or OUT status of SOF4
Interrupt IN or OUT status of SOF3
Interrupt IN or OUT status of SOF2
Interrupt IN or OUT status of SOF1
Interrupt IN or OUT status of SOF0
Bit 0 — Transaction error (IN and OUT)
Bit 1 — Babble (IN token only)
Bit 2 — Underrun (OUT token only)
SOF the complete split needs to be sent. Valid only for IN. Start
Frame2.
Hi-Speed USB OTG controller
© NXP B.V. 2007. All rights reserved.
ISP1761
82 of 163

Related parts for ISP1761ET