ISP1761ET NXP Semiconductors, ISP1761ET Datasheet - Page 98

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ISP1761ET

Manufacturer Part Number
ISP1761ET
Description
USB Interface IC USB 2.0 HS OTG HOST
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1761ET

Operating Supply Voltage
1.65 V to 3.6 V
Lead Free Status / Rohs Status
 Details
Other names
ISP1761ET,557

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NXP Semiconductors
[1]
ISP1761_4
Product data sheet
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
R/S/C
7
0
Table 95.
Bit
31
30 to 24
23 to 0
R/S/C
6
0
OTG Timer register (address low word set: 0388h, low word clear: 038Ah; high
word set: 038Ch, high word clear: 038Eh) bit description
Symbol
START_TMR
-
TIMER_INIT_
VALUE[23:0]
R/S/C
5
0
Rev. 04 — 5 March 2007
TIMER_INIT_VALUE[7:0]
Description
This is the start/stop bit of the OTG timer. Writing logic 1 will
cause the OTG timer to load TMR_INIT_VALUE into the counter
and start to count. Writing logic 0 will stop the timer. This bit is
automatically cleared when the OTG timer is timed out.
0 — stop the timer
1 — start the timer
reserved
These bits define the initial value used by the OTG timer. The
timer interval is 0.01 ms. Maximum time allowed is 167.772 s.
R/S/C
4
0
R/S/C
3
0
R/S/C
2
0
Hi-Speed USB OTG controller
R/S/C
1
0
© NXP B.V. 2007. All rights reserved.
ISP1761
R/S/C
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0
0

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