PALCE16V8Z-25PI Lattice, PALCE16V8Z-25PI Datasheet - Page 25

• Manufacturer Part Number: PALCE16V8Z-25PI
• Description: SPLD PAL® Family 8 Macro Cells 50MHz EECMOS Technology 5V 20-Pin PDIP
• Manufacturer: Lattice

Specifications of PALCE16V8Z-25PI

• Package: 20PDIP
• Family Name: PAL®
• Maximum Propagation Delay Time: 25 ns
• Typical Operating Supply Voltage: 5 V
• Maximum Internal Frequency: 50 MHz
• Number Of Product Terms Per Macro: 8
• Re-programmability Support: Yes

SWITCHING WAVEFORMS
Notes:
1. V T = 1.5 V
2. Input pulse amplitude 0 V to 3.0 V.
3. Input rise and fall times 2 ns to 5 ns typical.
Combinatorial
Clock
Feedback
Input or
Output
a. Combinatorial output
c. Clock width
t
WH
V
T
Output
t
PD
OE
t
PALCE16V8 and PALCE16V8Z Families
WL
e. OE to output disable/enable
V
T
16493E-3
16493E-4
V
T
t
PXZ
V
V
Registered
OH
OL
Feedback
Output
Input or
– 0.5V
+ 0.5V
Output
Input
Clock
d. Input to output disable/enable
V
T
t
PZX
16493E-7
b. Registered output
V
T
t
ER
t
V
V
S
OH
OL
+ 0.5V
– 0.5V
V
T
t
V
CO
T
t
H
V
16493E-6
16493E-5
t
T
EA
V
T
V
T
25