PALCE16V8Z-25PI Lattice, PALCE16V8Z-25PI Datasheet - Page 5

• Manufacturer Part Number: PALCE16V8Z-25PI
• Description: SPLD PAL® Family 8 Macro Cells 50MHz EECMOS Technology 5V 20-Pin PDIP
• Manufacturer: Lattice

Specifications of PALCE16V8Z-25PI

• Package: 20PDIP
• Family Name: PAL®
• Maximum Propagation Delay Time: 25 ns
• Typical Operating Supply Voltage: 5 V
• Maximum Internal Frequency: 50 MHz
• Number Of Product Terms Per Macro: 8
• Re-programmability Support: Yes

Programmable Output Polarity
The polarity of each macrocell can be active-high or active-low, either to match output signal
needs or to reduce product terms. Programmable polarity allows Boolean expressions to be
written in their most compact form (true or inverted), and the output can still be of the desired
polarity. It can also save “DeMorganizing” efforts.
Selection is through a programmable bit SL1
which controls an exclusive-OR gate at the output
x
of the AND/OR logic. The output is active high if SL1
is 1 and active low if SL1
is 0.
x
x
PALCE16V8 and PALCE16V8Z Families
5