APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 56

• Manufacturer Part Number: APA600-CQ208B
• Description: FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
• Manufacturer: Actel

Specifications of APA600-CQ208B

• Package: 208CQFP
• Family Name: ProASICPLUS
• Device System Gates: 600000
• Number Of Registers: 21504
• Maximum Internal Frequency: 180 MHz
• Typical Operating Supply Voltage: 2.5 V
• Maximum Number Of User I/os: 158
• Ram Bits: 129024
• Re-programmability Support: Yes

Input Buffer Delays
Figure 2-25 • Input Buffer Delays
Table 2-35 • Worst-Case Commercial Conditions
Table 2-36 • Worst-Case Commercial Conditions
2 -4 6
Macro Type
IB33
IB33S
Notes:
1. t
2. t
3. LVTTL delays are the same as CMOS delays.
4. For LP Macros, V
Macro Type
IB25LP
IB25LPS
Notes:
1. t
2. t
3. LVTTL delays are the same as CMOS delays.
4. For LP Macros, V
ProASIC
INYH
INYL
INYH
INYL
= Input Pad-to-Y Low
= Input Pad-to-Y Low
= Input Pad-to-Y High
= Input Pad-to-Y High
PLUS
V
V
DDP
DDP
Flash Family FPGAs
= 3.0 V, V
= 2.3 V, V
2.5 V, CMOS Input Levels
2.5 V, CMOS Input Levels
3.3 V, CMOS Input Levels
3.3 V, CMOS Input Levels
DDP
DDP
=2.3 V for delays.
= 2.3 V for delays.
DD
DD
PAD
= 2.3 V, T
= 2.3 V, T
J
J
= 70°C
= 70°C
3
3
3
3
, Low Power
, Low Power, Schmitt Trigger
, No Pull-up Resistor
, No Pull-up Resistor, Schmitt Trigger
Description
Description
IBx
Y
v5.9
PAD
GND
Y
50%
t
INYH
V
DDP
50%
V
50%
DD
Max. t
t
Max. t
INYL
Std.
Std.
0 V
0.4
0.6
0.9
0.7
50%
INYH
INYH
1
1
Max. t
Max. t
Std.
Std.
0.6
0.9
0.6
0.8
INYL
INYL
2
2
Units
Units
ns
ns
ns
ns