APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 63
APA600-CQ208B
Manufacturer Part Number
APA600-CQ208B
Description
FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA600-CQ208B
Package
208CQFP
Family Name
ProASICPLUS
Device System Gates
600000
Number Of Registers
21504
Maximum Internal Frequency
180 MHz
Typical Operating Supply Voltage
2.5 V
Maximum Number Of User I/os
158
Ram Bits
129024
Re-programmability Support
Yes
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Table 2-50 • JTAG Switching Characteristics
Figure 2-27 • JTAG Operation Timing
Description
Output delay from TCK falling to TDI, TMS
TDO Setup time before TCK rising
TDO Hold time after TCK rising
TCK period
RCK period
Notes:
1. For DC electrical specifications of the JTAG pins (TCK, TDI, TMS, TDO, TRST), refer to
2. If RCK is being used, there is no minimum on the TCK period.
and
Table 2-24 on page 2-38
when V
TMS, TDI
DDP
TCK
TDO
= 3.3 V.
t
TCKTDI
t
t
TCK
TDOTCK
Symbol
t
t
t
t
TDOTCK
TCKTDO
v5.9
TCKTDO
TCKTDI
t
t
RCK
TCK
Table 2-22 on page 2-34
100
Min
100
–4
10
0
2
ProASIC
1,000
1,000
Max
PLUS
4
Flash Family FPGAs
when V
DDP
Unit
ns
ns
ns
ns
ns
= 2.5 V
2-53
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