MCP3903-I/SS Microchip Technology, MCP3903-I/SS Datasheet - Page 26

IC AFE 24BIT 64KSPS 28SSOP

MCP3903-I/SS

Manufacturer Part Number
MCP3903-I/SS
Description
IC AFE 24BIT 64KSPS 28SSOP
Manufacturer
Microchip Technology
Series
-r
Datasheet

Specifications of MCP3903-I/SS

Featured Product
MCP3903 Six Channel ΔΣ A/D Converter
Number Of Bits
24
Number Of Channels
6
Power (watts)
-
Voltage - Supply, Analog
4.5 V ~ 5.5 V
Voltage - Supply, Digital
2.7 V ~ 3.6 V
Package / Case
28-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MCP3903
5.5
The second order modulator, SINC
and analog input structure all work together to produce
the device transfer function for the analog to digital con-
version, shown in
The channel data is either a 16-bit or 24-bit word,
presented in 23-bit or 15-bit plus sign, two’s
complement format and is MSB (left) justified.
The ADC data is two or three bytes wide depending on
the WIDTH bit of the associated channel. The 16-bit
mode includes a round to the closest 16-bit word
(instead of truncation) in order to improve the accuracy
of the ADC data.
EQUATION 5-3:
5.5.1
The ADC resolution is a function of the OSR
(Section 5.4 “SINC3
same for both channels. No matter what the resolution
is, the ADC output data is always presented in 24-bit
words, with added zeros at the end if the OSR is not
large enough to produce 24-bit resolution (left
justification).
TABLE 5-3:
TABLE 5-4:
DS25048B-page 26
0 1 1 1
0 1 1 1
0 0 0 0
1 1 1 1
1 0 0 0
1 0 0 0
0 1 1 1
0 1 1 1
0 0 0 0
1 1 1 1
1 0 0 0
1 0 0 0
DATA_CHn
DATA_CHn
ADC OUTPUT CODING
ADC RESOLUTION AS A FUNCTION
OF OSR
1 1 1 1
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
Equation
OSR = 256 OUTPUT CODE EXAMPLES
OSR = 128 OUTPUT CODE EXAMPLES
ADC Output Code (MSB First)
ADC Output Code (MSB First)
Filter”). The resolution is the
=
=
1 1 1 1
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
5-3.
(
------------------------------------ -
(
------------------------------------ -
V
V
CH
CH
REF+
REF+
n+
3
n+
filter, PGA, V
1 1 1 1
1 1 1 0
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
CH
V
CH
V
REF-
REF-
n-
n-
)
)
×
REF
×
1 1 1 1
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
32 768
1 1 1 1
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
8,388,608
,
×
In case of positive saturation (CHn+ - CHn- > V
the output is locked to 7FFFFF for 24 bit mode (7FFF
for 16 bit mode). In case of negative saturation (CHn+
- CHn- <-V
for 24-bit mode (8000 for 16 bit mode).
Equation 5-3
this transfer function needs to be multiplied by the
transfer function of the SINC
and
G 3
1 1 1 0
1 1 0 0
0 0 0 0
1 1 1 0
0 0 1 0
0 0 0 0
×
1 1 1 1
1 1 1 0
0 0 0 0
1 1 1 1
0 0 0 1
0 0 0 0
Equation
×
G 3
×
REF
is only true for DC inputs. For AC inputs,
(For 16-bit Mode Or WIDTH_CHn = 0)
5-2).
Hexadecimal
(For 24-bit Mode Or WIDTH_CHn = 1)
/3), the output code is locked to 800000
Hexadecimal
0x7FFFFE
0x7FFFFC
0xFFFFFE
0x800002
0x800000
0x000000
0x7FFFFE
0xFFFFFF
0x7FFFFF
0x800001
0x800000
0x000000
© 2011 Microchip Technology Inc.
3
filter (see
23-bit Resolution
+ 4,194,303
+ 4,194,302
- 4,194,303
- 4,194,304
+ 8,388,607
+ 8,388,606
- 8,388,607
- 8,388,608
Decimal
Decimal
-1
Equation 5-1
-1
0
0
REF
/3),

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