P89V51RD2FN NXP Semiconductors, P89V51RD2FN Datasheet - Page 58

• Manufacturer Part Number: P89V51RD2FN
• Description: MCU 8-Bit 89V 80C51 CISC 64KB Flash 5V 40-Pin PDIP Tube
• Manufacturer: NXP Semiconductors

Specifications of P89V51RD2FN

• Package: 40PDIP
• Device Core: 80C51
• Family Name: 89V
• Maximum Speed: 40 MHz
• Ram Size: 1 KB
• Program Memory Size: 64 KB
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 32
• Interface Type: SPI/UART
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
6.12.1 Idle mode
6.12 Power-saving modes
Table 51.
Table 52.
Bit addressable; Reset value: 00H
Table 53.
Table 54.
Not bit addressable; Reset value: 00H
Table 55.
The device provides two power saving modes of operation for applications where power
consumption is critical. The two modes are Idle and Power-down, see
Idle mode is entered setting the IDL bit in the PCON register. In Idle mode, the program
counter (PC) is stopped. The system clock continues to run and all interrupts and
peripherals remain active. The on-chip RAM and the special function registers hold their
data during this mode.
Bit
7
6
5
4
3
2
1
0
Bit
7 to 5
4
3 to 0
Bit
7 to 5
4
3 to 0
Bit
Symbol
Bit
Symbol
IP0H - Interrupt priority 0 high register (address B7H) bit description
IP1 - Interrupt priority 1 register (address F8H) bit allocation
IP1 - Interrupt priority 1 register (address F8H) bit description
IP1H - Interrupt priority 1 high register (address F7H) bit allocation
IP1H - Interrupt priority 1 high register (address F7H) bit description
Symbol
-
PPCH
PT2H
PSH
PT1H
PX1H
PT0H
PX0H
Symbol
-
PBO
-
Symbol
-
PBOH
-
7
7
-
-
Rev. 05 — 12 November 2009
6
6
-
-
Description
Reserved for future use. Should be set to ‘0’ by user programs.
PCA interrupt priority HIGH bit.
Timer 2 interrupt priority HIGH bit.
Serial Port interrupt priority HIGH bit.
Timer 1 interrupt priority HIGH bit.
External interrupt 1 priority HIGH bit.
Timer 0 interrupt priority HIGH bit.
External interrupt 0 priority HIGH bit.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
Brownout interrupt priority bit.
Reserved for future use. Should be set to ‘0’ by user programs.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
Brownout interrupt priority bit.
Reserved for future use. Should be set to ‘0’ by user programs.
5
5
-
-
PBOH
PBO
4
4
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
3
3
-
-
2
2
-
-
Table
© NXP B.V. 2009. All rights reserved.
1
1
-
-
56.
58 of 80
0
0
-
-