SI3225-G-GQ Silicon Laboratories Inc, SI3225-G-GQ Datasheet - Page 95

• Manufacturer Part Number: SI3225-G-GQ
• Description: IC PROSLIC/CODEC DUAL 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3225-G-GQ

• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: GCI, PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 65mA
• Power (watts): 941mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Includes: Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

might be set incorrectly. If this problem persists after the
power alarm settings are verified, a system fault is
probable, and the user should take measures to
diagnose the problem.
3.31.10. Upstream (Transmit) SC Channel Byte
The upstream SC channel byte looks similar to the
downstream
information quickly transfers the most time-critical
information from the Dual ProSLIC to the GCI bus. Each
upstream SC channel byte transfer from the Dual
ProSLIC lasts for at least two consecutive frames to
Initiating Action
Loop closure detected On-hook active → off-hook active,
Ring trip detected
Ringing burst
cadence
Power alarm detected
C/I Bit
CI2A
CI1A
CI0A
CI2B
CI1B
CI0B
Hook status information
Ground key information
Hook status information
Ground key information
Interrupt information on
Interrupt information on
Information Provided
SC
on channel A
on channel A
on channel B
on channel B
channel A
channel B
channel
Table 51. Monitored Data via Upstream SC Channel C/I Bits
Off-hook active → on-hook active
Ringing → on-hook transmission
On-hook transmission → ringing
Automatic Linefeed State
Ringing → off-hook active
Table 50. Automatic Linefeed State Transitions
byte
Any state → open
Transition
except
Mirrored Register Bits
(LONGHI bit)
(LONGHI bit)
LCRRTP[0]
LCRRTP[2]
LCRRTP[0]
LCRRTP[2]
IRQ0[0]+
IRQ0[1]+
(LCR bit)
IRQ0[4]+
IRQ0[5]+
(LCR bit)
IRQ0[2]
IRQ0[6]
that
the
Rev. 1.3
represent a valid transfer. The upstream C/I bits are
defined as follows:
CI2A, CI1A, CI0A
CI2B, CI1B, CI0B
MR, MX
Detection/Control Bits
PQ1DL (RAM 50)
CI2A = 0: No interrupt on channel A
CI2A = 1: Interrupt present on channel A
CI1A = 0: Channel A is on-hook
CI1A = 1: Channel A is off-hook
CI0A = 0: No longitudinal current detected
CI0A = 1: Longitudinal current detected in chan-
nel A
CI2A = 0: No interrupt on channel B
CI2A = 1: Interrupt present on channel B
CI1A = 0: Channel B is on-hook
CI1A = 1: Channel B is off-hook
CI0A = 0: No longitudinal current detected
CI0A = 1: Longitudinal current detected in chan-
nel B
LCR (Register 9)
RTP (Register 9)
(Register 23)
T1EN, T2EN
Si3220/25 Si3200/02
Monitors status data for channel A
Monitors status data for channel B
Monitor channel handshake bits
(see Monitor Channel section)
Context
Interrupt Enable/Status
RINGT1E, RINGT2E,
RINGT1S, RINGT2S
RTRIPE, RTRIPS
(Registers 17/20)
LOOPE, LOOPS
(Register 16/19)
(Register 16/19)
(Register 15/18)
PQ1E, PQ1S
Bits
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