552AD000226DG

Manufacturer Part Number552AD000226DG
ManufacturerSilicon Laboratories Inc
552AD000226DG datasheets

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Specifications of 552AD000226DG

Lead Free Status / Rohs StatusCompliant  
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Table 3. CLK± Output Frequency Characteristics
Parameter
Symbol
1,2,3
Nominal Frequency
1,4
Temperature Stability
1,4
Absolute Pull Range
Aging
5
Power up Time
Settling Time After FS Change
Notes:
1. See Section 3. "Ordering Information" on page 8 for further details.
2. Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz.
3. Nominal output frequency set by V
4. Selectable parameter specified by part number.
5. Time from power up or tristate mode to f
Table 4. CLK± Output Levels and Symmetry
Parameter
Symbol
1
LVPECL Output Option
V
O
V
OD
V
SE
2
LVDS Output Option
V
O
V
OD
2
CML Output Option
V
O
V
OD
3
CMOS Output Option
V
OH
V
OL
t
t
Rise/Fall time (20/80%)
R,
F
Symmetry (duty cycle)
SYM
Notes:
1. 50 Ω to V
– 2.0 V.
DD
= 100 Ω (differential).
2. R
term
3. C
= 15 pF
L
Test Condition
f
LVDS/CML/LVPECL
O
CMOS
T
= –40 to +85 °C
A
APR
Frequency drift over first year.
Frequency drift over 15 year life.
t
OSC
t
FRQ
= V
/2.
CNOM
DD
(to within ±1 ppm of f
).
O
O
Test Condition
mid-level
V
swing (diff)
swing (single-ended)
mid-level
swing (diff)
mid-level
swing (diff)
I
= 32 mA
0.8 x V
OH
I
= 32 mA
OL
LVPECL/LVDS/CML
CMOS with C
= 15 pF
L
LVPECL:
V
– 1.3 V (diff)
DD
LVDS:
1.25 V (diff)
CMOS:
V
/2
DD
Rev. 0.6
Si552
Min
Typ
Max
Units
10
—
945
10
—
160
–20
—
+20
–50
—
+50
–100
—
+100
±25
—
±375
—
—
±3
—
—
±10
—
—
10
—
—
10
Min
Typ
Max
– 1.42
—
V
– 1.25
DD
DD
1.1
—
1.9
0.55
—
0.95
1.125
1.20
1.275
0.5
0.7
0.9
—
V
– 0.75
—
DD
0.70
0.95
1.20
—
V
DD
DD
—
—
0.4
—
—
350
—
1
—
45
—
55
MHz
ppm
ppm
ppm
ms
ms
Units
V
V
PP
V
PP
V
V
PP
V
V
PP
V
ps
ns
%
3

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