MT29F8G08AAAWP-ET:ATR Micron Technology Inc, MT29F8G08AAAWP-ET:ATR Datasheet - Page 14

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MT29F8G08AAAWP-ET:ATR

Manufacturer Part Number
MT29F8G08AAAWP-ET:ATR
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F8G08AAAWP-ET:ATR

Cell Type
NAND
Density
8Gb
Access Time (max)
18ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
30b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP-I
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
1G
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant
Figure 9:
Table 4:
PDF: 09005aef818a56a7 / Source: 09005aef81590bdd
2gb_nand_m29b__2.fm - Rev. I 1/06 EN
Cycle
First
Second
Third
Fourth
Fifth
Cache Register
Data Register
4,096 blocks
Array Addressing: MT29F4G08BxB and MT29F8G08FxB
CAx = column address; RAx = row address.
Array Organization for MT29F4G08BxB and MT29F8G08FxB (x8)
RA19
RA27
LOW
LOW
I/O7
CA7
Notes: 1. Die address boundary: 0 = 0 – 2Gb, 1 = 2Gb – 4Gb.
Note:
RA18
RA26
LOW
LOW
I/O6
CA6
For the 8Gb MT29F8G08F, the 4Gb array organization shown here applies to each chip
enable (CE# and CE2#).
2,048
2,048
1 Block
RA17
RA25
LOW
LOW
I/O5
CA5
2,112 bytes
2, 4, 8Gb: x8/x16 Multiplexed NAND Flash Memory
RA16
RA24
LOW
LOW
I/O4
CA4
14
64
64
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CA11
RA15
RA23
LOW
I/O3
CA3
64 pages = 1 block
1 page
1 block
1 device = (2K + 64) bytes x 64 pages
I/O 7
I/O 0
CA10
RA14
RA22
LOW
= (2K + 64 bytes)
= (2K + 64) bytes x 64 pages
= (128K + 4K) bytes
= 4,224 Mb
I/O2
CA2
x 4,096 blocks
(128K + 4K) bytes
©2004 Micron Technology, Inc. All rights reserved.
RA29
RA13
RA21
I/O1
CA1
CA9
1
Addressing
RA12
RA20
RA28
I/O0
CA0
CA8

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